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docs tl431acdr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
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package.json tl431acdr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
page.json tl431acdr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
README.md Initial commit: component/tl431acdr · Ray 1mo ago
tl431acdr-etched.fit.json tl431acdr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tl431acdr-etched.glb tl431acdr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tl431acdr-etched.step tl431acdr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tl431acdr.glb Publish 0.1.0 · Ray 1mo ago
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tl431acdr.step Publish 0.1.0 · Ray 1mo ago

TL431ACDR

Texas Instruments · Voltage Reference · SOIC-8

TL431ACDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CATHODE bidirectional Programmable output pin that regulates voltage from Vref (2.495V nominal) to 36V and sinks cathode current in the range of 1mA to 100mA.
2 ANODE power_in Common return and ground reference pin for the device.
3 ANODE power_in Common return and ground reference pin for the device.
4 NC unconnected No internal connection.
5 NC unconnected No internal connection.
6 ANODE power_in Common return and ground reference pin for the device.
7 ANODE power_in Common return and ground reference pin for the device.
8 REF input Reference voltage input pin; typically biased to Vref = 2.495V (±0.5% to ±2% depending on grade) and requires reference current of 2µA to 4µA from external bias network.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: TL431ACDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tl431acdr-etched.step / tl431acdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl431acdr.step / tl431acdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (86 pp, sha256 0eb18c491f5517a3, retrieved 2026-09-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF