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TL3474AIPWR

Texas Instruments · Operational Amplifier · TSSOP-14

TL3474AIPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of amplifier channel 1, which the datasheet notes is short-circuit protected.
2 1IN- input Inverting input of amplifier channel 1.
3 1IN+ input Non-inverting input of amplifier channel 1; the common-mode input range includes the negative rail (VCC−/GND), allowing single-supply operation.
4 VCC+ power_in Positive supply voltage; the recommended supply range for the device is 4 V to 36 V (VCC± ±2 V to ±18 V max rating of VCC+ 18 V).
5 2IN+ input Non-inverting input of amplifier channel 2; the common-mode input range includes the negative rail (VCC−/GND).
6 2IN- input Inverting input of amplifier channel 2.
7 2OUT output Output of amplifier channel 2, which the datasheet notes is short-circuit protected.
8 3OUT output Output of amplifier channel 3, which the datasheet notes is short-circuit protected.
9 3IN- input Inverting input of amplifier channel 3.
10 3IN+ input Non-inverting input of amplifier channel 3; the common-mode input range includes the negative rail (VCC−/GND).
11 VCC- / GND power_in Negative supply voltage or ground, which is the reference for the common-mode input range that includes this pin.
12 4IN+ input Non-inverting input of amplifier channel 4; the common-mode input range includes the negative rail (VCC−/GND).
13 4IN- input Inverting input of amplifier channel 4.
14 4OUT output Output of amplifier channel 4, which the datasheet notes is short-circuit protected.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Amplifiers/Comparators
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (VCC=5V) VIO 1.5 3 mV VIC = 0, VO = 0, RS = 50Ω; VCC = 5V; TA = 25°C 5
Input offset voltage (VCC=±15V) VIO 1 3 mV VIC = 0, VO = 0, RS = 50Ω; VCC = ±15V; TA = 25°C 5
Input offset voltage (VCC=±15V, full range) VIO 5 mV VIC = 0, VO = 0, RS = 50Ω; VCC = ±15V; full range 5
Input offset voltage temperature coefficient aVIO 10 μV/°C VCC = ±15V; full range 5
Input offset current IIO 0.01 75 nA VCC = ±15V; TA = 25°C 5
Input offset current (full range) IIO 0.01 nA VCC = ±15V; full range 5
Input bias current IIB 0.01 500 nA VCC = ±15V; TA = 25°C 5
Input bias current (full range) IIB 0.01 nA VCC = ±15V; full range 5
Common-mode input voltage range VICR -15 12.8 V RS = 50Ω; TA = 25°C 5
Common-mode input voltage range (full range) VICR -15 12.8 V RS = 50Ω; full range 5
High-level output voltage (RL=2kΩ, VCC=5V) VOH 3.7 4.8 V VCC+ = 5V, VCC− = 0, RL = 2kΩ; TA = 25°C 5
High-level output voltage (RL=10kΩ) VOH 13.6 14.8 V RL = 10kΩ; TA = 25°C 5
High-level output voltage (RL=2kΩ, full range) VOH 13.4 V RL = 2kΩ; full range 5
Low-level output voltage (RL=2kΩ, VCC=5V) VOL 0.005 0.3 V VCC+ = 5V, VCC− = 0, RL = 2kΩ; TA = 25°C 5
Low-level output voltage (RL=10kΩ) VOL -14.8 -14.3 V RL = 10kΩ; TA = 25°C 5
Low-level output voltage (RL=2kΩ, full range) VOL -13.5 V RL = 2kΩ; full range 5
Large-signal differential voltage amplification AVD 25 100 V/mV VO = ±10V, RL = 2kΩ; TA = 25°C 5
Large-signal differential voltage amplification (full range) AVD 20 V/mV VO = ±10V, RL = 2kΩ; full range 5
Short-circuit output current (source) IOS -10 -75 mA VID = 1V, VO = 0; TA = 25°C 5
Short-circuit output current (sink) IOS 20 27 mA VID = −1V, VO = 0; TA = 25°C 5
Common-mode rejection ratio CMRR 80 97 dB VIC = VICR(min), RS = 50Ω; TA = 25°C 5
Supply voltage rejection ratio kSVR 70 97 dB VCC± = ±13.5V to ±16.5V, RS = 100Ω; TA = 25°C 5
Supply current per channel ICC 0.56 4.5 mA VO = 0, no load; TA = 25°C 6
Supply current per channel (full range) ICC 5.5 mA VO = 0, no load; full range 6
Supply current per channel (VCC=5V) ICC 4.5 mA VCC+ = 5V, VO = 2.5V, VCC− = 0, no load; TA = 25°C 6
Positive slew rate SR+ 8 10 V/μs VI = −10V to 10V, RL = 2kΩ, CL = 300pF, AV = 1; VCC± = ±15V, TA = 25°C 6
Negative slew rate SR− 13 V/μs AV = −1; VCC± = ±15V, TA = 25°C 6
Small-signal slew rate 0.5 V/μs VI = −0.1V to 0.1V; VCC± = ±15V, TA = 25°C 6
Settling time to 0.1% ts 2 μs AVD = −1, 10V step; to 0.1%; VCC± = ±15V, TA = 25°C 6
Settling time to 0.01% ts 2.5 μs AVD = −1, 10V step; to 0.01%; VCC± = ±15V, TA = 25°C 6
Equivalent input noise voltage Vn 10.8 nV/√Hz f = 1kHz, RS = 100Ω 6
Equivalent input noise current In 2 fA/√Hz f = 1kHz 6
Total harmonic distortion THD 0.02 % VO(PP) = 2V to 20V, RL = 2kΩ, AVD = 10, f = 10kHz 6
Gain-bandwidth product GBW 4.5 MHz f = 100kHz 6
Power bandwidth BW 85 kHz VO(PP) = 20V, RL = 2kΩ, AVD = 1, THD = 5.0% 6
Phase margin (CL=0) φm 70 ° RL = 2kΩ, CL = 0 6
Phase margin (CL=300pF) φm 50 ° RL = 2kΩ, CL = 300pF 6
Gain margin (CL=0) 12 dB RL = 2kΩ, CL = 0 6
Gain margin (CL=300pF) 4 dB RL = 2kΩ, CL = 300pF 6
Differential input resistance ri 540 GΩ VIC = 0 6
Input capacitance Ci 10 pF VIC = 0 6
Channel separation 101 dB f = 10kHz 6
Open-loop output impedance zo 525 Ω f = 1MHz, AV = 1 6
Supply voltage VCC+ VCC+ 18 V 4
Supply voltage VCC− VCC– -18 V 4
Differential input voltage VID -36 36 V 4
Input current (per input) II -1 1 mA 4
Output current IO -80 80 mA 4
Total current into VCC+ 80 mA 4
Total current out of VCC− 80 mA 4
Operating virtual junction temperature TJ 150 °C 4
Lead temperature (10 s, 1.6mm from case) 260 °C 1.6mm (1/16 inch) from case for 10 seconds 4
Storage temperature Tstg -65 150 °C 4
Junction-to-ambient thermal resistance (PW package) θJA 113 °C/W PW package 4
Supply voltage (VCC±) VCC± 4 36 V 4
Common-mode input voltage (VCC=5V) VIC 0 2.8 V VCC = 5V 4
Common-mode input voltage (VCC=±15V) VIC -15 12.8 V VCC± = ±15V 4
Operating free-air temperature (TL3474AI) TA -40 105 °C TL3474AI, natural convection 4

CAD (KiCad official)

  • Symbol: TL3474AIPWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: tl3474aipwr-etched.step / tl3474aipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl3474aipwr.step / tl3474aipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 895228f93473c495, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF