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TL3474AIN

Texas Instruments · Operational Amplifier · PDIP-14

TL3474AIN from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Channel 1 output, short-circuit protected and able to drive up to 10,000 pF of load capacitance.
2 1IN− input Channel 1 inverting input; input current limited to ±1 mA and differential input voltage to ±36 V.
3 1IN+ input Channel 1 noninverting input; common-mode range includes VCC− (ground) and extends to 12.8 V at VCC± = ±15 V.
4 VCC+ power_in Positive supply; recommended supply range is 4 V to 36 V total, with an absolute maximum of 18 V relative to the midpoint.
5 2IN+ input Channel 2 noninverting input; common-mode range includes VCC− (ground).
6 2IN− input Channel 2 inverting input; input current limited to ±1 mA.
7 2OUT output Channel 2 output, short-circuit protected, with output current limited to ±80 mA absolute maximum.
8 3OUT output Channel 3 output, short-circuit protected, with output current limited to ±80 mA absolute maximum.
9 3IN− input Channel 3 inverting input; input current limited to ±1 mA.
10 3IN+ input Channel 3 noninverting input; common-mode range includes VCC− (ground).
11 VCC−/GND power_in Negative supply or ground for single-supply operation; total current out of this pin is limited to 80 mA absolute maximum.
12 4IN+ input Channel 4 noninverting input; common-mode range includes VCC− (ground).
13 4IN− input Channel 4 inverting input; input current limited to ±1 mA.
14 4OUT output Channel 4 output, short-circuit protected and able to drive up to 10,000 pF of load capacitance.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-14
Category Operational Amplifier/Comparator
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage VIO 1.5 3 mV VCC = 5 V, TA = 25°C, VIC=0, VO=0, RS=50 Ω 4
Input offset voltage VIO 1 3 mV VCC = ±15 V, TA = 25°C 4
Input offset voltage VIO 5 mV VCC = ±15 V, Full range (−40°C to 105°C) 4
Temperature coefficient of input offset voltage αVIO 10 µV/°C VCC = ±15 V, Full range 4
Input offset current IIO 6 75 nA VCC = ±15 V, 25°C 4
Input offset current IIO 300 nA VCC = ±15 V, Full range 4
Input bias current IIB 100 500 nA VCC = ±15 V, 25°C 4
Input bias current IIB 700 nA VCC = ±15 V, Full range 4
Large-signal differential voltage amplification AVD 25 100 V/mV VO = ±10 V, RL = 2 kΩ, 25°C 4
Large-signal differential voltage amplification AVD 20 V/mV VO = ±10 V, RL = 2 kΩ, Full range 4
Short-circuit output current (source) IOS -10 -34 mA VID = 1 V, VO = 0, 25°C 4
Short-circuit output current (sink) IOS 20 27 mA VID = −1 V, VO = 0, 25°C 4
Common-mode rejection ratio CMRR 80 97 dB VIC = VICR(min), RS = 50 Ω, 25°C 4
Supply-voltage rejection ratio kSVR 70 97 dB VCC± = ±13.5 V to ±16.5 V, RS = 100 Ω, 25°C 4
Supply current (per channel) ICC 3.5 4.5 mA VO = 0, No load, 25°C 4
Supply current (per channel) ICC 4.5 5.5 mA VO = 0, No load, Full range 4
Supply voltage VCC± 4 36 V 3
Common-mode input voltage VIC 0 2.8 V VCC = 5 V 3
Common-mode input voltage VIC -15 12.8 V VCC± = ±15 V 3
Operating free-air temperature TA -40 105 °C TL3474I, TL3474AI 3
Supply voltage VCC+ VCC+ 18 V see Note 1 3
Supply voltage VCC− VCC− -18 V see Note 1 3
Differential input voltage VID -36 36 V see Note 2 3
Input current (each input) II -1 1 mA 3
Output current IO -80 80 mA 3
Total current into VCC+ 80 mA 3
Total current out of VCC− 80 mA 3
Operating virtual junction temperature TJ 150 °C 3
Lead temperature 260 °C 1.6 mm (1/16 inch) from case for 10 seconds 3
Storage temperature range Tstg -65 150 °C 3
Package thermal impedance, N package θJA 80 °C/W see Notes 4 and 5 3
Positive slew rate SR+ 13 V/µs VI = −10 V to 10 V, RL = 2 kΩ, CL = 300 pF, AV = 1; VCC± = ±15 V, TA = 25°C 5
Settling time to 0.1% ts 1.1 µs AVD = −1, 10-V step 5
Settling time to 0.01% ts 2.2 µs AVD = −1, 10-V step 5
Gain-bandwidth product GBW 3 4 MHz f = 100 kHz 5
Equivalent input noise voltage Vn 49 nV/√Hz f = 1 kHz, RS = 100 Ω 5
Total harmonic distortion THD 0.02 % VO(PP) = 2 V to 20 V, RL = 2 kΩ, AVD = 10, f = 10 kHz 5
Differential input resistance ri 150 MΩ VIC = 0 5
Input capacitance Ci 2.5 pF VIC = 0 5

CAD (KiCad official)

  • Symbol: TL3474AIN
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: PDIP-14 (KiCad packages3D, STEP)
  • 3D model files: tl3474ain-etched.step / tl3474ain-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl3474ain.step / tl3474ain.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (18 pp, sha256 de968a021f07fad6, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF