component

TL3116IPWR

Public Made by Adom

by adom

Texas Instruments Comparators, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentamplifiers-comparatorstl3116ipwrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

TL3116IPWR

Texas Instruments · Comparators · TSSOP-8

TL3116IPWR from Texas Instruments, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC+ power_in Positive supply terminal; the device operates from a single 5-V supply or from split ±5-V supplies, with absolute maximum supply voltage VDD of ±7 V.
2 IN+ input Non-inverting comparator input; with VDD = ±5 V the common-mode input voltage range is −5 V to 2.5 V, and the input common-mode range extends to the negative rail.
3 IN− input Inverting comparator input; differential input voltage VID is limited to 7 V (absolute maximum) and common-mode range is −5 V to 2.5 V with VDD = ±5 V.
4 VCC− power_in Negative supply terminal used for the split ±5-V supply operation; the negative supply is specified from −7 V to −2 V for supply-voltage rejection testing.
5 LATCH ENABLE input Digital latch-enable input with VIL maximum of 0.8 V and VIH minimum of 2 V, used to latch the complementary outputs; setup time tsu is 3.4 ns.
6 GND power_in Ground terminal; all voltages except differential voltages are referenced to network ground.
7 Q OUT output Complementary comparator output (the overbar is lost in the extracted text); high-level output is at least 3.6 V at 1 mA and low-level output is at most 600 mV at 4 mA sink, with output current limited to ±20 mA.
8 Q OUT output Complementary comparator output (the overbar is lost in the extracted text); paired with pin 7 as the opposite-polarity output, with output current limited to ±20 mA.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (see Note 1) VDD -7 7 V 3
Differential input voltage (see Note 2) VID 7 V 3
Input voltage range VI 7 V 3
Input voltage (LATCH ENABLE) VI 7 V 3
Output current IO -20 20 mA 3
Operating free-air temperature range (TL3116I) TA -40 85 °C 3
Storage temperature range Tstg -65 150 °C 3
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 °C 1,6 mm (1/16 inch) from case for 10 seconds 3
Continuous total power dissipation, PW package 525 mW TA ≤ 25°C 3
Continuous total power dissipation, PW package (power rating) 336 mW TA = 70°C 3
Input offset voltage VIO 0.5 3 mV TA = 25°C 4
Input offset voltage VIO 3.5 mV TA = full range 4
Input offset current IIO 0.1 0.2 µA TA = 25°C 4
Input offset current IIO 0.35 µA TA = full range 4
Input bias current IIB 0.7 1.1 µA TA = 25°C 4
Input bias current IIB 1.5 µA TA = full range 4
Common-mode input voltage range VICR -5 2.5 V VDD = ±5 V 4
Common-mode input voltage range VICR 0 2.5 V VDD = 5 V 4
Common-mode rejection ratio CMRR 75 100 dB −5 ≤ VIC ≤ 2.5 V 4
Supply-voltage rejection ratio (positive supply) kSVR 60 80 dB Positive supply: 4.6 V ≤ +VDD ≤ 5.4 V, TA = 25°C 4
Supply-voltage rejection ratio (negative supply) kSVR 80 100 dB Negative supply: −7 V ≤ −VDD ≤ −2 V, TA = 25°C 4
Low-level output voltage VOL 400 600 mV I(sink) = 4 mA, V+ ≤ 4.6 V, TA = 25°C 4
Low-level output voltage VOL 750 mV I(sink) = 10 mA, V+ ≤ 4.6 V, TA = 25°C 4
High-level output voltage VOH 3.6 3.9 V V+ ≤ 4.6 V, IO = 1 mA, TA = 25°C 4
High-level output voltage VOH 3.4 3.8 V V+ ≤ 4.6 V, IO = 10 mA, TA = 25°C 4
Positive supply current ICC 12.7 15 mA TA = full range 4
Negative supply current ICC -2.6 -3 mA TA = full range 4
Low-level input voltage (LATCH ENABLE) VIL 0.8 V 4
High-level input voltage (LATCH ENABLE) VIH 2 V 4
Low-level input current (LATCH ENABLE) IIL 0 1 µA VLE = 0 4
Low-level input current (LATCH ENABLE) IIL 24 45 µA VLE = 2 V 4
Propagation delay time tpd1 9.9 12 ns ΔVI = 100 mV, TA = 25°C 5
Propagation delay time tpd1 9.9 15 ns ΔVI = 100 mV, VOD = 5 mV, TA = full range 5
Propagation delay time tpd1 8.2 10.3 ns ΔVI = 100 mV, TA = 25°C 5
Propagation delay time tpd1 8.2 13.7 ns ΔVI = 100 mV, VOD = 20 mV, TA = full range 5

CAD (KiCad official)

  • Symbol: TL3116IPWR
  • Footprint: Package_SO:TSSOP-8_3x3mm_P0.65mm
  • 3D model: TSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: tl3116ipwr-etched.step / tl3116ipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl3116ipwr.step / tl3116ipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (20 pp, sha256 86b4a0323deeafdd, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF