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Ray tl1963a-15kttr: specified limits as data (metadata.characteristics, 57 rows from the datasheet) 1d931af 19d ago

TL1963A-15KTTR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-263-5

TL1963A-15KTTR from Texas Instruments, in a TO-263-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SHDN input Enable input: driving it high (VIH min 2 V, up to 20 V) enables the regulator and driving it low (VIL max 0.25 V) disables it, and it must be tied to VIN if shutdown control is not used.
2 IN power_in Input supply pin, specified for 2.4 V to 20 V on the new-chip version, with an absolute maximum range of -0.3 V to 20.2 V and a recommended input capacitor of 1 µF.
3 GND power_in Ground pin, which the datasheet states must be connected to the exposed thermal pad and PCB ground plane for rated thermal performance.
4 OUT power_out Regulator output that requires a capacitor of at least 10 µF with ESR of 3 Ω or less to x stabilize operation, with an absolute maximum output voltage of -0.3 V to 20 V on the DCQ and KTT new-chip versions.
5 SENSE/ADJ input On the fixed-voltage TL1963A-xx versions this pin is the SENSE error-amplifier input and must be connected to OUT for proper operation, while on the adjustable version it is the ADJ feedback pin that must connect to the output through a resistor divider, with an absolute maximum of -0.3 V to 7 V on the new chip.
6 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TO-263-5
Category Power Management (PMIC)
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage, new die (recommended) VIN 2.4 20 V 5
Input voltage, old die (recommended) VIN 20 V Old die; minimum printed as VOUT + VDO 5
SHDN high-level input voltage VIH 2 20 V 5
SHDN low-level input voltage VIL 0.25 V 5
Output current IOUT 0 1.5 A 5
Operating junction temperature TJ -40 125 °C 6
Output capacitor COUT 10 µF 6
Output capacitor ESR, new die COUT ESR 3 Ω 6
Input voltage, old die (absolute max) VIN -20 20 V Old die 5
Input voltage, new die (absolute max) VIN -0.3 20.2 V New die 5
Output voltage, old die (absolute max) VOUT -20 20 V Old die 5
Output voltage, new die DCQ and KTT (absolute max) VOUT -0.3 20 V New die, DCQ and KTT packages 5
Input-output differential, old die (absolute max) -20 20 V Old die 5
Input-output differential, new die (absolute max) -7 20 V New die 5
Sense voltage, old die (absolute max) -20 20 V Old die 5
Sense voltage, new die (absolute max) -0.3 7 V New die 5
SHDN voltage, old die (absolute max) -20 20 V Old die 5
SHDN voltage, new die (absolute max) -0.3 20 V New die 5
Maximum junction temperature, old die (absolute max) TJMAX 125 °C Old die 5
Operating junction temperature, new die (absolute max) TJ -40 150 °C New die 5
Storage temperature Tstg -65 150 °C 5
VIN minimum input voltage, old die (ILOAD 1.5 A) 2.1 2.5 V ILOAD = 1.5A, TJ = -40°C 至 125°C 6
VIN minimum input voltage, new die (ILOAD 1.5 A) 2.4 V ILOAD = 1.5A, TJ = -40°C 至 125°C 6
UVLO rising threshold, new die VUVLO (RISING) 2 2.2 2.3 V VIN rising, IOUT = 10mA, TJ = -40°C 至 125°C 6
UVLO falling threshold, new die VUVLO (FALLING) 1.9 2.05 2.15 V VIN falling, IOUT = 10mA, TJ = -40°C 至 125°C 6
Dropout voltage VDO 0.0015 0.06 V ILOAD = 1mA, TJ = 25°C 8
Dropout voltage VDO 0.1 V ILOAD = 1mA, TJ = -40°C 至 125°C 8
Dropout voltage VDO 0.025 0.17 V ILOAD = 100mA, TJ = 25°C 8
Dropout voltage VDO 0.22 V ILOAD = 100mA, TJ = -40°C 至 125°C 8
Dropout voltage VDO 0.12 0.27 V ILOAD = 500mA, TJ = 25°C 8
Dropout voltage VDO 0.35 V ILOAD = 500mA, TJ = -40°C 至 125°C 8
Dropout voltage VDO 0.34 0.45 V ILOAD = 1.5A, TJ = 25°C 8
Dropout voltage VDO 0.55 V ILOAD = 1.5A, TJ = -40°C 至 125°C 8
GND pin current, old die IGND 1 1.5 mA VIN = VOUT(NOM)+1, ILOAD = 0mA, TJ = -40°C 至 125°C 8
GND pin current, old die IGND 1.1 1.6 mA VIN = VOUT(NOM)+1, ILOAD = 1mA 8
GND pin current, old die IGND 3.8 5.5 mA VIN = VOUT(NOM)+1, ILOAD = 100mA 8
GND pin current, old die IGND 15 25 mA VIN = VOUT(NOM)+1, ILOAD = 500mA 8
GND pin current, old die IGND 80 120 mA VIN = VOUT(NOM)+1, ILOAD = 1.5A 8
GND pin current, new die IGND 1.2 mA VIN = VOUT(NOM)+1, ILOAD = 0A, TJ = -40°C 至 125°C 8
GND pin current, new die IGND 1.25 mA VIN = VOUT(NOM)+1, ILOAD = 1.5A 8
SHDN turn-on threshold (off to on) 0.9 2 V VOUT = 关断至导通, TJ = -40°C 至 125°C 8
SHDN turn-off threshold (on to off) 0.25 0.75 V VOUT = 导通至关断 8
Current limit, old die ILIMIT 1.6 A VIN = VOUT(NOMINAL) + 1V, TJ = -40°C 至 125°C 9
Current limit, new die ILIMIT 1.6 A TJ = -40°C 至 125°C 9
Input reverse leakage current, old die IIL 1 µA VIN = -20V, VOUT = 0V, TJ = -40°C 至 125°C 9
Reverse output current, TL1963A-15 (old die) IRO 600 1200 µA VOUT = 1.5V, VIN < 1.5V, TJ = 25°C 9
Steady-state reverse current, new die IRC 250 µA VOUT = 7V, VIN = 2.4V, TJ = -40°C 至 125°C 9
Reverse current detection threshold, new die 25 mV VIN = 6V, VOUT rising; VOUT - VIN at detection, TJ = -40°C 至 125°C 9
Thermal shutdown rising temperature TSD+ 150 161 °C 9
Thermal shutdown falling temperature TSD- 130 141 °C 9
UVLO hysteresis, new die VUVLO (HYST) 150 mV TJ = -40°C 至 125°C 6
Junction-to-ambient thermal resistance (KTT) RθJA 32.9 °C/W KTT column, old-device label per datasheet 6
Junction-to-case (top) thermal resistance (KTT) RθJC(top) 37.6 °C/W KTT column, old-device label per datasheet 6
Junction-to-board thermal resistance (KTT) RθJB 18.9 °C/W KTT column, old-device label per datasheet 6
Junction-to-top characterization parameter (KTT) ψJT 5.7 °C/W KTT column, old-device label per datasheet 6
Junction-to-board characterization parameter (KTT) ψJB 17.3 °C/W KTT column, old-device label per datasheet 6
Junction-to-case (bottom) thermal resistance (KTT) RθJC(bot) 1 °C/W KTT column 6

CAD (KiCad official)

  • Symbol: TL1963A-15KTTR
  • Footprint: Package_TO_SOT_SMD:TO-263-5_TabPin6
  • 3D model: TO-263-5 (KiCad packages3D, STEP)
  • 3D model files: tl1963a-15kttr-etched.step / tl1963a-15kttr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl1963a-15kttr.step / tl1963a-15kttr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (59 pp, sha256 678bca278f2398fb, retrieved 2026-10-10, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF