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TL16CP754CPMR

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Texas Instruments UART, LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TL16CP754CPMR

Texas Instruments · UART · LQFP-64(10x10)

TL16CP754CPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DSRA input Data set ready for UART channel A, active low; a low indicates the modem or data set is powered on and ready for data exchange with the UART.
2 CTSA input Clear to send for channel A, active low; it affects transmit and receive only when auto-CTS is enabled through EFR[7], and its status is readable at MSR[4].
3 DTRA output Data terminal ready for channel A, active low; it goes low after writing 1 to MCR[0] and high after writing 0 to MCR[0] or after reset, and can also control an RS-485 driver.
4 VCC power_in Power supply input; the device supports 1.8 V, 2.5 V, 3.3 V, or 5 V supply operation.
5 RTSA output Request to send for channel A, active low; it goes low when data is ready to send and affects transfers only when auto-RTS is enabled through EFR[6].
6 INTA tri_state Interrupt output for channel A, active high; it is enabled when MCR[3] is set and an enabled interrupt condition exists, and is high-impedance after reset.
7 CSA input Chip select for UART channel A, active low, enabling data transfers between the CPU and channel A.
8 TXA output Transmit data output for channel A; it is high when idle in normal mode and low when idle in IrDA mode.
9 IOW input Write strobe, active low; a valid low transfers the data bus contents into the internal register selected by A0-A2.
10 TXB output Transmit data output for channel B; it is high when idle in normal mode and low when idle in IrDA mode.
11 CSB input Chip select for UART channel B, active low, enabling data transfers between the CPU and channel B.
12 INTB tri_state Interrupt output for channel B, active high; it is enabled when MCR[3] is set and an enabled interrupt condition exists, and is high-impedance after reset.
13 RTSB output Request to send for channel B, active low; it goes low when data is ready to send and affects transfers only when auto-RTS is enabled through EFR[6].
14 GND power_in Power and signal ground.
15 DTRB output Data terminal ready for channel B, active low; it goes low after writing 1 to MCR[0] and high after writing 0 to MCR[0] or after reset, and can also control an RS-485 driver.
16 CTSB input Clear to send for channel B, active low; it affects transmit and receive only when auto-CTS is enabled through EFR[7], and its status is readable at MSR[4].
17 DSRB input Data set ready for UART channel B, active low; a low indicates the modem or data set is powered on and ready for data exchange with the UART.
18 CDB input Carrier detect for channel B, active low; a low indicates the modem has detected a carrier.
19 RIB input Ring indicator for channel B, active low; a low-to-high transition generates a modem status interrupt if enabled.
20 RXB input Receive data input for channel B; it should be held high when no data is being received in normal mode and is disabled in local loopback mode.
21 CLKSEL input Selects the divide-by-1 prescaler when high or the divide-by-4 prescaler when low; the value is latched into MCR[7] at the trailing edge of RESET.
22 A2 input Internal register address bit 2 select.
23 A1 input Internal register address bit 1 select.
24 A0 input Internal register address bit 0 select.
25 XTAL1 input Crystal input or external clock input; a crystal may be connected between XTAL1 and XTAL2, or an external clock may be applied to XTAL1 for custom data rates.
26 XTAL2 output Crystal oscillator output or buffered clock output.
27 RESET input Active high reset that resets the internal registers and outputs and disables the UART transmitter output and receiver input during reset.
28 GND power_in Power and signal ground.
29 RXC input Receive data input for channel C; it should be held high when no data is being received in normal mode and is disabled in local loopback mode.
30 RIC input Ring indicator for channel C, active low; a low-to-high transition generates a modem status interrupt if enabled.
31 CDC input Carrier detect for channel C, active low; a low indicates the modem has detected a carrier.
32 DSRC input Data set ready for UART channel C, active low; a low indicates the modem or data set is powered on and ready for data exchange with the UART.
33 CTSC input Clear to send for channel C, active low; it affects transmit and receive only when auto-CTS is enabled through EFR[7], and its status is readable at MSR[4].
34 DTRC output Data terminal ready for channel C, active low; it goes low after writing 1 to MCR[0] and high after writing 0 to MCR[0] or after reset, and can also control an RS-485 driver.
35 VCC power_in Power supply input; the device supports 1.8 V, 2.5 V, 3.3 V, or 5 V supply operation.
36 RTSC output Request to send for channel C, active low; it goes low when data is ready to send and affects transfers only when auto-RTS is enabled through EFR[6].
37 INTC tri_state Interrupt output for channel C, active high; it is enabled when MCR[3] is set and an enabled interrupt condition exists, and is high-impedance after reset.
38 CSC input Chip select for UART channel C, active low, enabling data transfers between the CPU and channel C.
39 TXC output Transmit data output for channel C; it is high when idle in normal mode and low when idle in IrDA mode.
40 IOR input Read strobe, active low; a valid low loads the selected internal register onto the data bus D0-D7.
41 TXD output Transmit data output for channel D; it is high when idle in normal mode and low when idle in IrDA mode.
42 CSD input Chip select for UART channel D, active low, enabling data transfers between the CPU and channel D.
43 INTD tri_state Interrupt output for channel D, active high; it is enabled when MCR[3] is set and an enabled interrupt condition exists, and is high-impedance after reset.
44 RTSD output Request to send for channel D, active low; it goes low when data is ready to send and affects transfers only when auto-RTS is enabled through EFR[6].
45 GND power_in Power and signal ground.
46 DTRD output Data terminal ready for channel D, active low; it goes low after writing 1 to MCR[0] and high after writing 0 to MCR[0] or after reset, and can also control an RS-485 driver.
47 CTSD input Clear to send for channel D, active low; it affects transmit and receive only when auto-CTS is enabled through EFR[7], and its status is readable at MSR[4].
48 DSRD input Data set ready for UART channel D, active low; a low indicates the modem or data set is powered on and ready for data exchange with the UART.
49 CDD input Carrier detect for channel D, active low; a low indicates the modem has detected a carrier.
50 RID input Ring indicator for channel D, active low; a low-to-high transition generates a modem status interrupt if enabled.
51 RXD input Receive data input for channel D; it should be held high when no data is being received in normal mode and is disabled in local loopback mode.
52 VCC power_in Power supply input; the device supports 1.8 V, 2.5 V, 3.3 V, or 5 V supply operation.
53 D0 bidirectional Data bus bit 0 (least significant bit), 8-bit 3-state bus to and from the CPU; first bit in a transmit or receive serial stream.
54 D1 bidirectional Data bus bit 1, 8-bit 3-state bus to and from the CPU.
55 D2 bidirectional Data bus bit 2, 8-bit 3-state bus to and from the CPU.
56 D3 bidirectional Data bus bit 3, 8-bit 3-state bus to and from the CPU.
57 D4 bidirectional Data bus bit 4, 8-bit 3-state bus to and from the CPU.
58 D5 bidirectional Data bus bit 5, 8-bit 3-state bus to and from the CPU.
59 D6 bidirectional Data bus bit 6, 8-bit 3-state bus to and from the CPU.
60 D7 bidirectional Data bus bit 7 (most significant bit), 8-bit 3-state bus to and from the CPU.
61 GND power_in Power and signal ground.
62 RXA input Receive data input for channel A; it should be held high when no data is being received in normal mode and is disabled in local loopback mode.
63 RIA input Ring indicator for channel A, active low; a low-to-high transition generates a modem status interrupt if enabled.
64 CDA input Carrier detect for channel A, active low; a low indicates the modem has detected a carrier.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-64(10x10)
Category Interface
Pins 64

CAD (KiCad official)

  • Symbol: TL16CP754CPMR
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: tl16cp754cpmr-etched.step / tl16cp754cpmr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl16cp754cpmr.step / tl16cp754cpmr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (56 pp, sha256 261f4abb074e0d18, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF