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TL16C752DPFBR
Public Made by Adomby adom
Texas Instruments UART, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTL16C752DPFBR
Texas Instruments · UART · TQFP-48(7x7)
TL16C752DPFBR from Texas Instruments, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D5 | bidirectional | Data bus bit 5, an 8-bit 3-state bidirectional bus to the controlling CPU. |
| 2 | D6 | bidirectional | Data bus bit 6, an 8-bit 3-state bidirectional bus to the controlling CPU. |
| 3 | D7 | bidirectional | Data bus bit 7, an 8-bit 3-state bidirectional bus to the controlling CPU. |
| 4 | RXB | input | Receive data input for UART channel B; RXB should be held high when no data is being received in normal mode. |
| 5 | RXA | input | Receive data input for UART channel A; RXA should be held high when no data is being received in normal mode. |
| 6 | TXRDYB | output | Transmit ready for channel B (active low), going low when a trigger level number of spaces is available. |
| 7 | TXA | output | Serial transmit data output for UART channel A. |
| 8 | TXB | output | Serial transmit data output for UART channel B. |
| 9 | OPB | output | User-defined output for channel B, set by MCR bit 3 and high after reset. |
| 10 | CSA | input | Chip select A (active low) that enables data transfers between the CPU and channel A. |
| 11 | CSB | input | Chip select B (active low) that enables data transfers between the CPU and channel B. |
| 12 | NC | unconnected | No internal connection. |
| 13 | XTAL1 | input | Crystal or external clock input that sets the oscillator clock for the baud rate generator. |
| 14 | XTAL2 | output | Crystal oscillator output or buffered clock output, used with XTAL1. |
| 15 | IOW | input | Write strobe (active low) that transfers the data bus contents into the register selected by A0-A2. |
| 16 | CDB | input | Carrier detect for channel B (active low); a low indicates a carrier was detected by the modem. |
| 17 | GND | power_in | Power signal and power ground. |
| 18 | RXRDYB | output | Receive ready for channel B (active low), going low at the trigger level or timeout and high when the RX FIFO is empty or in error. |
| 19 | IOR | input | Read strobe (active low) that loads the register selected by A0-A2 onto the data bus D0-D7. |
| 20 | DSRB | input | Data set ready for channel B (active low), indicating the modem is powered on and ready for data exchange. |
| 21 | RIB | input | Ring indicator for channel B (active low); a low-to-high transition generates a modem status interrupt if enabled. |
| 22 | RTSB | output | Request to send for channel B (active low), used for auto-RTS hardware flow control when enabled. |
| 23 | CTSB | input | Clear to send for channel B (active low), used for auto-CTS hardware flow control when enabled. |
| 24 | NC | unconnected | No internal connection. |
| 25 | NC | unconnected | No internal connection. |
| 26 | A2 | input | Address bit 2 for selecting the internal registers. |
| 27 | A1 | input | Address bit 1 for selecting the internal registers. |
| 28 | A0 | input | Address bit 0 for selecting the internal registers. |
| 29 | INTB | output | Interrupt B (active high), enabled by MCR bit 3 and high-impedance after reset. |
| 30 | INTA | output | Interrupt A (active high), enabled by MCR bit 3 and high-impedance after reset. |
| 31 | RXRDYA | output | Receive ready for channel A (active low), going low at the trigger level or timeout and high when the RX FIFO is empty or in error. |
| 32 | OPA | output | User-defined output for channel A, set by MCR bit 3 and high after reset. |
| 33 | RTSA | output | Request to send for channel A (active low), used for auto-RTS hardware flow control when enabled. |
| 34 | DTRA | output | Data terminal ready for channel A (active low), controlled by MCR bit 0 and high after reset. |
| 35 | DTRB | output | Data terminal ready for channel B (active low), controlled by MCR bit 0 and high after reset. |
| 36 | RESET | input | Active high reset that resets the internal registers and all outputs, disabling the transmitter output and receiver input during reset. |
| 37 | NC | unconnected | No internal connection. |
| 38 | CTSA | input | Clear to send for channel A (active low), used for auto-CTS hardware flow control when enabled. |
| 39 | DSRA | input | Data set ready for channel A (active low), indicating the modem is powered on and ready for data exchange. |
| 40 | CDA | input | Carrier detect for channel A (active low); a low indicates a carrier was detected by the modem. |
| 41 | RIA | input | Ring indicator for channel A (active low); a low-to-high transition generates a modem status interrupt if enabled. |
| 42 | VCC | power_in | Power supply input, supporting a wide supply voltage range of 1.62 V to 5.5 V. |
| 43 | TXRDYA | output | Transmit ready for channel A (active low), going low when a trigger level number of spaces is available. |
| 44 | D0 | bidirectional | Data bus bit 0, the least significant bit and first bit of the serial stream, on the 8-bit 3-state bus. |
| 45 | D1 | bidirectional | Data bus bit 1 on the 8-bit 3-state bidirectional bus to the controlling CPU. |
| 46 | D2 | bidirectional | Data bus bit 2 on the 8-bit 3-state bidirectional bus to the controlling CPU. |
| 47 | D3 | bidirectional | Data bus bit 3 on the 8-bit 3-state bidirectional bus to the controlling CPU. |
| 48 | D4 | bidirectional | Data bus bit 4 on the 8-bit 3-state bidirectional bus to the controlling CPU. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TQFP-48(7x7) |
| Category | Interface |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
TL16C752DPFBR - Footprint:
Package_QFP:TQFP-48_7x7mm_P0.5mm - 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
tl16c752dpfbr-etched.step/tl16c752dpfbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tl16c752dpfbr.step/tl16c752dpfbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (57 pp, sha256
1938aff79986a6e4, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).