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TL1454ACPWR

Texas Instruments · AC-DC Controllers And Regulators · TSSOP-16

TL1454ACPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CT passive Oscillator timing capacitor connection, paired with RT to GND; the datasheet recommends a 10% or better NPO ceramic with a recommended range of 10 pF to 4000 pF.
2 RT passive Oscillator timing resistor connection to GND, with a recommended range of 5.1 kΩ to 100 kΩ for an oscillator frequency of 50 kHz to 2 MHz.
3 DTC1 input Channel 1 dead-time control input that sets the maximum duty cycle, with threshold 1.1 V at 0% and 0.5 V at 100% duty cycle; soft start is implemented by a capacitor between REF and DTC.
4 IN1+ input Channel 1 noninverting error-amplifier input, with common-mode input voltage limited to −0.2 V to 1.45 V and an absolute maximum of 23 V.
5 IN1− input Channel 1 inverting error-amplifier input, with common-mode input voltage limited to −0.2 V to 1.45 V and an absolute maximum of 23 V.
6 COMP1 output Channel 1 error-amplifier output used for loop compensation, with DC loading limited to 45 µA source current and a recommended sink current of 100 µA maximum.
7 GND power_in Network ground; all device voltages are referenced to this pin.
8 OUT1 output Channel 1 totem-pole MOSFET driver output for n-channel step-up or flyback converters, rated for ±40 mA output current and 20 V output voltage.
9 OUT2 output Channel 2 totem-pole MOSFET driver output for p-channel step-down or inverting converters, rated for ±40 mA output current and 20 V output voltage.
10 VCC power_in Supply voltage input, with a recommended range of 3.6 V to 20 V and an absolute maximum of 23 V.
11 COMP2 output Channel 2 error-amplifier output used for loop compensation, with DC loading limited to 45 µA source current and a recommended sink current of 100 µA maximum.
12 IN2− input Channel 2 inverting error-amplifier input, with common-mode input voltage limited to −0.2 V to 1.45 V and an absolute maximum of 23 V.
13 IN2+ input Channel 2 noninverting error-amplifier input, with common-mode input voltage limited to −0.2 V to 1.45 V and an absolute maximum of 23 V.
14 DTC2 input Channel 2 dead-time control input that sets the maximum duty cycle, with threshold 1.1 V at 0% and 0.5 V at 100% duty cycle.
15 SCP input Short-circuit protection node; a capacitor to GND sets the time-out, and the latch sets when it charges to 1 V, with the latch resetting when VCC falls to 2 V or less or the capacitor is discharged.
16 REF power_out 1.26 V reference output that can source a maximum of 1 mA for external loads, with a 0.047 µF to 0.1 µF ceramic capacitor to GND recommended.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Power Management (PMIC)
Pins 16

CAD (KiCad official)

  • Symbol: TL1454ACPWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: tl1454acpwr-etched.step / tl1454acpwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl1454acpwr.step / tl1454acpwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 11c6c297b6d5682c, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF