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TL1431CDR
Public Made by Adomby adom
Texas Instruments Voltage References, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTL1431CDR
Texas Instruments · Voltage References · SOIC-8
TL1431CDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CATHODE | bidirectional | Shunt current/voltage input; cathode voltage VKA ranges from VI(ref) to 36V (37V absolute max) with cathode current of 1mA to 100mA. |
| 2 | ANODE | power_in | Common pin, normally connected to ground; ANODE terminals are connected internally. |
| 3 | ANODE | power_in | Common pin, normally connected to ground; ANODE terminals are connected internally. |
| 4 | NC | unconnected | No internal connection. |
| 5 | NC | unconnected | No internal connection. |
| 6 | ANODE | power_in | Common pin, normally connected to ground; ANODE terminals are connected internally. |
| 7 | ANODE | power_in | Common pin, normally connected to ground; ANODE terminals are connected internally. |
| 8 | REF | input | Threshold reference input relative to common ground, with reference input current rated -0.05mA to 10mA absolute maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reference input voltage | VI(ref) | 2490 | 2500 | 2510 | mV | VKA = VI(ref), IKA = 10mA, TA = 25°C | 5 |
| Reference input voltage over temperature | VI(ref) | 2480 | 2520 | mV | VKA = VI(ref), IKA = 10mA, TA = 0°C to 70°C | 5 | |
| Deviation of reference input voltage over full temperature range | VI(dev) | 4 | 20 | mV | VKA = VI(ref), TA = 0°C to 70°C | 5 | |
| Ratio of change in reference input voltage to change in cathode voltage | ΔVI(ref)/ΔVKA | -1.1 | -2 | mV/V | ΔVKA = 3V to 36V, TA = 0°C to 70°C | 5 | |
| Reference input current | II(ref) | 1.5 | 2.5 | µA | R1 = 10kΩ, R2 = ∞, IKA = 10mA, TA = 25°C | 5 | |
| Reference input current over temperature | II(ref) | 3 | µA | R1 = 10kΩ, R2 = ∞, IKA = 10mA, TA = 0°C to 70°C | 5 | ||
| Deviation of reference input current over full temperature range | II(dev) | 0.2 | 1.2 | µA | R1 = 10kΩ, R2 = ∞, TA = 0°C to 70°C | 5 | |
| Minimum cathode current for regulation | Imin | 0.45 | 1 | mA | VKA = VI(ref), TA = 25°C | 5 | |
| Off-state cathode current | Ioff | 0.18 | 0.5 | µA | VKA = 36V, VI(ref) = 0, TA = 25°C | 5 | |
| Off-state cathode current over temperature | Ioff | 2 | µA | VKA = 36V, VI(ref) = 0, TA = 0°C to 70°C | 5 | ||
| Output impedance | /zKA/ | 0.2 | 0.4 | Ω | VKA = VI(ref), f ≤ 1kHz, IKA = 1mA to 100mA, TA = 25°C | 5 | |
| Cathode voltage | VKA | 36 | V | min is VI(ref) | 4 | ||
| Cathode current | IKA | 1 | 100 | mA | 4 | ||
| Operating free-air temperature | TA | 0 | 70 | °C | TL1431C | 4 | |
| Cathode voltage | VKA | 37 | V | with respect to ANODE | 4 | ||
| Continuous cathode current | IKA | -100 | 150 | mA | 4 | ||
| Reference input current | II(ref) | -0.05 | 10 | mA | 4 | ||
| Lead temperature | 260 | °C | 1.6mm (1/16in) from case for 10s | 4 | |||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | Human-body model, ANSI/ESDA/JEDEC JS-001 | 4 | |
| ESD CDM | V(ESD) | -1000 | 1000 | V | Charged-device model, JESD22-C101 | 4 | |
| Junction-to-ambient thermal resistance | RθJA | 114.7 | °C/W | D (SOIC) 8 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 59 | °C/W | D (SOIC) 8 pins | 4 | ||
| Junction-to-board thermal resistance | RθJB | 55.4 | °C/W | D (SOIC) 8 pins | 4 | ||
| Junction-to-top characterization parameter | ψJT | 12 | °C/W | D (SOIC) 8 pins | 4 | ||
| Junction-to-board characterization parameter | ψJB | 54.8 | °C/W | D (SOIC) 8 pins | 4 |
CAD (KiCad official)
- Symbol:
TL1431CDR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tl1431cdr-etched.step/tl1431cdr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tl1431cdr.step/tl1431cdr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (41 pp, sha256
482f5ddecabc080b, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).