# TL084IYDT

**STMicroelectronics** · FET InputAmplifiers · SOIC-14

TL084IYDT from STMicroelectronics, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT1 | output | Output of op-amp 1. Push-pull output stage with short-circuit protection; typical output swing ±13.5 V into RL=10 kΩ at VCC=±15 V. |
| 2 | IN1- | input | Inverting input of op-amp 1. High-impedance J-FET gate (~10^12 Ω); Ib ≈ 20 pA typ at 25°C. |
| 3 | IN1+ | input | Non-inverting input of op-amp 1. High-impedance J-FET gate; input common-mode range typ +15/-12 V at VCC=±15 V. |
| 4 | VCC+ | power_in | Positive supply rail. Absolute max ±18 V; typical operation ±5 V to ±15 V. Shared by all four amplifiers; ICC ≈ 1.4 mA per amplifier. |
| 5 | IN2+ | input | Non-inverting input of op-amp 2. High-impedance J-FET gate. |
| 6 | IN2- | input | Inverting input of op-amp 2. High-impedance J-FET gate. |
| 7 | OUT2 | output | Output of op-amp 2. Short-circuit protected; typical slew rate 16 V/µs. |
| 8 | OUT3 | output | Output of op-amp 3. Short-circuit protected push-pull output. |
| 9 | IN3- | input | Inverting input of op-amp 3. High-impedance J-FET gate. |
| 10 | IN3+ | input | Non-inverting input of op-amp 3. High-impedance J-FET gate. |
| 11 | VCC- | power_in | Negative supply rail. Absolute max ±18 V; may be tied to GND for single-supply use (VCC+ up to +36 V total). |
| 12 | IN4+ | input | Non-inverting input of op-amp 4. High-impedance J-FET gate. |
| 13 | IN4- | input | Inverting input of op-amp 4. High-impedance J-FET gate. |
| 14 | OUT4 | output | Output of op-amp 4. Short-circuit protected push-pull output. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-14 |
| Category | Op-amp/Cmp |
| Pins | 14 |

## Ordering variants

Same part, different packaging or reel option.

- `TL084IYDTD`
- `TL084IYDT`
- `TL084IYDTN`
- `TL084IYDTPT`

## CAD (KiCad official)

- Symbol: `TL084IYDT`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `tl084iydt-etched.step` / `tl084iydt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tl084iydt.step` / `tl084iydt.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](docs/tl084iydt-datasheet.pdf) (12 pp, sha256 `eb7e889b65f9614b`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tl084iydt-datasheet.pdf)