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Name	Last commit message	Last updated
docs	tl084imt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	5d ago
viewers	tl084imt: viewers · Ray	29d ago
package.json	Publish 0.1.0 · Ray	29d ago
page.json	tl084imt: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray	23h ago
README.md	tl084imt: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray	19d ago
tl084imt-etched.fit.json	tl084imt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	5d ago
tl084imt-etched.glb	tl084imt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	5d ago
tl084imt-etched.step	tl084imt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	5d ago
tl084imt.glb	Publish 0.1.0 · Ray	29d ago
tl084imt.kicad_mod	Publish 0.1.0 · Ray	29d ago
tl084imt.kicad_sym	Publish 0.1.0 · Ray	29d ago
tl084imt.lbr	Publish 0.1.0 · Ray	29d ago
tl084imt.step	Publish 0.1.0 · Ray	29d ago

TL084IMT

HGSEMI · Operational Amplifier · TSSOP-14

TL084IMT from HGSEMI, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	OUT1	output	Output of op-amp 1. Push-pull output stage with short-circuit protection (Ios typ 50 mA); drives loads down to RL=2 kohm with +/-10 V swing on +/-15 V supplies.
2	IN1-	input	Inverting input of op-amp 1. High-impedance J-FET input; input bias current typ 20 nA; common-mode input voltage range +/-11 V (+15/-12 V typ) on +/-15 V supplies.
3	IN1+	input	Non-inverting input of op-amp 1. High-impedance J-FET input; differential input voltage rated up to +/-30 V.
4	VCC+	power_in	Positive supply rail. Absolute maximum +/-18 V (dual-supply); typical operation at +15 V. Supplies all four amplifiers; total quiescent current typ 4 x 1.4 mA.
5	IN2+	input	Non-inverting input of op-amp 2. High-impedance J-FET input.
6	IN2-	input	Inverting input of op-amp 2. High-impedance J-FET input.
7	OUT2	output	Output of op-amp 2. Short-circuit protected output stage; slew rate 16 V/us typ.
8	OUT3	output	Output of op-amp 3. Short-circuit protected output stage.
9	IN3-	input	Inverting input of op-amp 3. High-impedance J-FET input.
10	IN3+	input	Non-inverting input of op-amp 3. High-impedance J-FET input.
11	VCC-	power_in	Negative supply rail. Absolute maximum +/-18 V; typical operation at -15 V for dual-supply use.
12	IN4+	input	Non-inverting input of op-amp 4. High-impedance J-FET input.
13	IN4-	input	Inverting input of op-amp 4. High-impedance J-FET input.
14	OUT4	output	Output of op-amp 4. Short-circuit protected output stage.

Key specifications

Parameter	Value
Manufacturer	HGSEMI
Package	TSSOP-14
Category	Op-amp/Cmp
Pins	14

Ordering variants

Same part, different packaging or reel option.

TL084IMT/TR
TL084IMTCMT/TR
TL084IMTIM/TR
TL084IMTCM/TR
TL084IMTIN
TL084IMTCN

CAD (KiCad official)

Symbol: TL084IMT
Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
3D model: TSSOP-14 (KiCad packages3D, STEP)
3D model files: tl084imt-etched.step / tl084imt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl084imt.step / tl084imt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: HGSEMI datasheet (7 pp, sha256 627ea3a2bf786676, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF