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TL074QDREP

Texas Instruments · FET InputAmplifiers · SOIC-14

TL074QDREP from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of amplifier 1; output may be shorted to ground or either supply for unlimited duration.
2 1IN− input Inverting input of amplifier 1; JFET input, differential input voltage limit ±30 V and input voltage must not exceed supply magnitude or 15 V.
3 1IN+ input Non-inverting input of amplifier 1; JFET input, input voltage limit ±15 V.
4 VCC+ power_in Positive supply voltage, absolute maximum 18 V.
5 2IN+ input Non-inverting input of amplifier 2; JFET input, input voltage limit ±15 V.
6 2IN− input Inverting input of amplifier 2; JFET input, differential input voltage limit ±30 V.
7 2OUT output Output of amplifier 2; output may be shorted to ground or either supply for unlimited duration.
8 3OUT output Output of amplifier 3; output may be shorted to ground or either supply for unlimited duration.
9 3IN− input Inverting input of amplifier 3; JFET input, differential input voltage limit ±30 V.
10 3IN+ input Non-inverting input of amplifier 3; JFET input, input voltage limit ±15 V.
11 VCC− power_in Negative supply voltage, absolute maximum 18 V magnitude.
12 4IN+ input Non-inverting input of amplifier 4; JFET input, input voltage limit ±15 V.
13 4IN− input Inverting input of amplifier 4; JFET input, differential input voltage limit ±30 V.
14 4OUT output Output of amplifier 4; output may be shorted to ground or either supply for unlimited duration.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Operational Amplifier/Comparator
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage VIO 3 6 mV VO = 0, RS = 50 Ω, TA = 25°C 4
Input offset voltage (full range) VIO 8 mV VO = 0, RS = 50 Ω, Full range (-40°C to 125°C for Q) 4
Input offset voltage temperature coefficient αVIO 18 μV/°C VO = 0, RS = 50 Ω, Full range 4
Input offset current IIO 5 100 pA VO = 0, TA = 25°C 4
Input offset current (125°C) IIO 2 nA VO = 0, TA = 125°C 4
Input bias current IIB 65 200 pA VO = 0, TA = 25°C 4
Input bias current (125°C) IIB 20 nA VO = 0, TA = 125°C 4
Common-mode input voltage range VICR 11 V TA = 25°C; printed ±11, typ -12 to 15 4
Maximum peak output voltage swing VOM 12 13.5 V RL = 10 kΩ, TA = 25°C (printed ±12, typ ±13.5) 4
Maximum peak output voltage swing (full range) VOM 12 V RL ≥ 10 kΩ, Full range (printed ±12) 4
Maximum peak output voltage swing (full range) VOM 10 V RL ≥ 2 kΩ, Full range (printed ±10) 4
Large-signal differential voltage amplification AVD 35 200 V/mV VO = ±10 V, RL ≥ 2 kΩ, TA = 25°C 4
Large-signal differential voltage amplification (full range) AVD 15 V/mV VO = ±10 V, RL ≥ 2 kΩ, Full range 4
Unity-gain bandwidth B1 3 MHz TA = 25°C 4
Common-mode rejection ratio CMRR 80 86 dB VIC = VICRmin, VO = 0, RS = 50 Ω, TA = 25°C 4
Supply-voltage rejection ratio kSVR 80 86 dB VCC = ±9 V to ±15 V, VO = 0, RS = 50 Ω, TA = 25°C 4
Supply current (each amplifier) ICC 1.4 2.5 mA VO = 0, No load, TA = 25°C 4
Crosstalk attenuation VO1/VO2 120 dB AVD = 100, TA = 25°C 4
Slew rate at unity gain SR 8 13 V/μs VI = 10 V, RL = 2 kΩ, CL = 100 pF, See Figure 1 4
Rise time tr 0.1 μs VI = 20 V, RL = 2 kΩ, CL = 100 pF, See Figure 1 4
Overshoot factor 20 % VI = 20 V, RL = 2 kΩ, CL = 100 pF, See Figure 1 4
Equivalent input noise voltage Vn 18 nV/√Hz RS = 20 Ω, f = 1 kHz 4
Equivalent input noise voltage Vn 4 μV RS = 20 Ω, f = 10 Hz to 10 kHz 4
Equivalent input noise current In 0.01 pA/√Hz RS = 20 Ω, f = 1 kHz 4
Total harmonic distortion THD 0.003 % VIrms = 6 V, AVD = 1, RL ≥ 2 kΩ, RS ≤ 1 kΩ, f = 1 kHz 4
Supply voltage VCC+ VCC+ 18 V over operating free-air temperature range 3
Supply voltage VCC- VCC- 18 V over operating free-air temperature range 3
Differential input voltage VID -30 30 V printed ±30 3
Input voltage VI -15 15 V printed ±15 3
Operating virtual junction temperature TJ 150 °C 3
Storage temperature range Tstg -65 150 °C 3
Thermal resistance, junction-to-ambient θJA 86 °C/W TL074 3
Thermal resistance, junction-to-case θJC 51.5 °C/W TL074 3

CAD (KiCad official)

  • Symbol: TL074QDREP
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: tl074qdrep-etched.step / tl074qdrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl074qdrep.step / tl074qdrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (21 pp, sha256 62e144aa204ddb27, retrieved 2026-10-30, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF