# TL074CDT

**STMicroelectronics** · FET Input Amplifiers · SOIC-14

TL074CDT from STMicroelectronics, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT1 | output | Output of op-amp 1. Push-pull output, short-circuit protected to either supply; slew rate 16 V/µs typical. |
| 2 | IN1- | input | Inverting input of op-amp 1. High-impedance JFET input; input bias current typ 20 pA at 25 °C. Absolute input voltage limit ±15 V. |
| 3 | IN1+ | input | Non-inverting input of op-amp 1. High-impedance JFET input; common-mode range extends to VCC+. |
| 4 | VCC+ | power_in | Positive supply rail. Total VCC 6 to 36 V (typically ±3 V to ±18 V split supplies). Absolute max ±18 V per rail. |
| 5 | IN2+ | input | Non-inverting input of op-amp 2. High-impedance JFET input. |
| 6 | IN2- | input | Inverting input of op-amp 2. High-impedance JFET input. |
| 7 | OUT2 | output | Output of op-amp 2. Push-pull, short-circuit protected. |
| 8 | OUT3 | output | Output of op-amp 3. Push-pull, short-circuit protected. |
| 9 | IN3- | input | Inverting input of op-amp 3. High-impedance JFET input. |
| 10 | IN3+ | input | Non-inverting input of op-amp 3. High-impedance JFET input. |
| 11 | VCC- | power_in | Negative supply rail. Typically tied to a negative rail (split supply) or GND for single-supply operation. Absolute max ±18 V per rail. |
| 12 | IN4+ | input | Non-inverting input of op-amp 4. High-impedance JFET input. |
| 13 | IN4- | input | Inverting input of op-amp 4. High-impedance JFET input. |
| 14 | OUT4 | output | Output of op-amp 4. Push-pull, short-circuit protected. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-14 |
| Category | Amplifiers/Comparators |
| Pins | 14 |

## Ordering variants

Same part, different packaging or reel option.

- `TL074CDT`
- `TL074CDTD`

## CAD (KiCad official)

- Symbol: `TL074CDT`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `tl074cdt-etched.step` / `tl074cdt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tl074cdt.step` / `tl074cdt.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8565856926975762432) (18 pp, sha256 `d09153516934dfc8`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tl074cdt-datasheet.pdf)