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TL071BCDR
Public Made by Adomby adom
Texas Instruments FET Input Amplifiers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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tl071bcdr: specified limits as data (metadata.characteristics, 29 rows from the datasheet)
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TL071BCDR
Texas Instruments · FET Input Amplifiers · SOIC-8
TL071BCDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Not connected on the D (SOIC-8) package; the datasheet specifies no function for this pin. |
| 2 | IN- | input | Inverting input; the input voltage must stay between (VCC-) + 4 V and (VCC+) + 0.1 V under recommended operating conditions for this device class. |
| 3 | IN+ | input | Non-inverting input; the input voltage must stay between (VCC-) + 4 V and (VCC+) + 0.1 V under recommended operating conditions for this device class. |
| 4 | VCC- | power_in | Negative power supply; the total supply VS = (VCC+) - (VCC-) must be 4.5 V to 40 V (±2.25 V to ±20 V). |
| 5 | NC | unconnected | Not connected on the D (SOIC-8) package; the datasheet specifies no function for this pin. |
| 6 | OUT | output | Amplifier output; a short circuit to ground is continuous, one amplifier per package, per the absolute maximum ratings. |
| 7 | VCC+ | power_in | Positive power supply; the total supply VS = (VCC+) - (VCC-) must be 4.5 V to 40 V (±2.25 V to ±20 V). |
| 8 | NC | unconnected | Not connected on the D (SOIC-8) package; the datasheet specifies no function for this pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage (TL07xBC, 25°C) | VOS | 2 | 3 | mV | VO = 0V, RS = 50Ω | 16 | |
| Input offset voltage (TL07xBC, full range) | VOS | 5 | mV | TA = full range (0°C to 70°C), VO = 0V, RS = 50Ω | 16 | ||
| Input offset voltage drift | dVOS/dT | -18 | 18 | µV/℃ | VO = 0V, RS = 50Ω, TA = full range | 16 | |
| Input offset current (TL07xBC, 25°C) | IOS | 5 | 100 | pA | VO = 0V | 16 | |
| Input offset current (TL07xBC, full range) | IOS | 2 | nA | TA = full range (0°C to 70°C), VO = 0V | 16 | ||
| Input bias current (TL07xBC, 25°C) | IB | 65 | 200 | pA | VO = 0V | 16 | |
| Input bias current (TL07xBC, full range) | IB | 7 | nA | TA = full range (0°C to 70°C), VO = 0V | 16 | ||
| Common-mode input voltage range | VCM | -11 | 11 | V | 16 | ||
| Maximum peak output voltage swing | VOM | -12 | 13.5 | 12 | V | RL = 10kΩ | 16 |
| Maximum peak output voltage swing (full range) | VOM | -12 | 12 | V | RL ≥ 10kΩ, TA = full range | 16 | |
| Maximum peak output voltage swing | VOM | -10 | 10 | V | RL ≥ 2kΩ | 16 | |
| Large-signal open-loop voltage gain (25°C) | AOL | 50 | 200 | V/mV | VO = 0V | 16 | |
| Large-signal open-loop voltage gain (full range) | AOL | 25 | V/mV | TA = full range | 16 | ||
| Common-mode rejection ratio | CMRR | 75 | 100 | dB | VIC = VICR(min), VO = 0V, RS = 50Ω | 16 | |
| Supply voltage rejection ratio | PSRR | 80 | 100 | dB | VS = ±9V to ±18V, VO = 0V, RS = 50Ω | 16 | |
| Quiescent current per amplifier | IQ | 1.4 | 2.5 | mA | VO = 0V, no load | 17 | |
| Slew rate | SR | 8 | 20 | V/μs | VI = 10V, CL = 100pF, RL = 2kΩ | 17 | |
| Gain bandwidth product | GBW | 5.25 | MHz | all other devices (not NS/PS packages, not TL07xM) | 16 | ||
| Channel separation (DC) | 1 | µV/V | f = 0Hz | 17 | |||
| Settling time | tS | 0.1 | μs | VI = 20V, CL = 100pF, RL = 2kΩ | 17 | ||
| Input voltage noise density | eN | 37 | nV/√Hz | f = 1kHz, all other devices | 17 | ||
| Input voltage noise density | eN | 21 | nV/√Hz | f = 10kHz, all other devices | 17 | ||
| Input voltage noise | EN | 1.4 | µVRMS | f = 0.1Hz to 10Hz, all other devices | 17 | ||
| Input current noise | iN | 10 | fA/√Hz | RS = 20Ω, f = 1kHz | 17 | ||
| Phase margin | 56 | ° | G = +1, RL = 10kΩ, CL = 20pF | 17 | |||
| Overload recovery time | 300 | ns | VIN × gain > VS | 17 | |||
| Total harmonic distortion + noise | THD+N | 0.00012 | % | VS = 40V, VO = 6VRMS, G = +1, f = 1kHz, all other devices | 17 | ||
| EMI rejection ratio | EMIRR | 53 | dB | f = 1GHz, TL07xC/AC/BC/I | 17 | ||
| Open-loop output impedance | ZO | 125 | Ω | f = 1MHz, IO = 0A, TL07xC/AC/BC/I | 17 |
CAD (KiCad official)
- Symbol:
TL071BCDR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tl071bcdr-etched.step/tl071bcdr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tl071bcdr.step/tl071bcdr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (90 pp, sha256
ec4a201e6b0fe15d, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TL071BCDR
**Texas Instruments** · FET Input Amplifiers · SOIC-8
TL071BCDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Not connected on the D (SOIC-8) package; the datasheet specifies no function for this pin. |
| 2 | IN- | input | Inverting input; the input voltage must stay between (VCC-) + 4 V and (VCC+) + 0.1 V under recommended operating conditions for this device class. |
| 3 | IN+ | input | Non-inverting input; the input voltage must stay between (VCC-) + 4 V and (VCC+) + 0.1 V under recommended operating conditions for this device class. |
| 4 | VCC- | power_in | Negative power supply; the total supply VS = (VCC+) - (VCC-) must be 4.5 V to 40 V (±2.25 V to ±20 V). |
| 5 | NC | unconnected | Not connected on the D (SOIC-8) package; the datasheet specifies no function for this pin. |
| 6 | OUT | output | Amplifier output; a short circuit to ground is continuous, one amplifier per package, per the absolute maximum ratings. |
| 7 | VCC+ | power_in | Positive power supply; the total supply VS = (VCC+) - (VCC-) must be 4.5 V to 40 V (±2.25 V to ±20 V). |
| 8 | NC | unconnected | Not connected on the D (SOIC-8) package; the datasheet specifies no function for this pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage (TL07xBC, 25°C) | VOS | | 2 | 3 | mV | VO = 0V, RS = 50Ω | 16 |
| Input offset voltage (TL07xBC, full range) | VOS | | | 5 | mV | TA = full range (0°C to 70°C), VO = 0V, RS = 50Ω | 16 |
| Input offset voltage drift | dVOS/dT | -18 | | 18 | µV/℃ | VO = 0V, RS = 50Ω, TA = full range | 16 |
| Input offset current (TL07xBC, 25°C) | IOS | | 5 | 100 | pA | VO = 0V | 16 |
| Input offset current (TL07xBC, full range) | IOS | | | 2 | nA | TA = full range (0°C to 70°C), VO = 0V | 16 |
| Input bias current (TL07xBC, 25°C) | IB | | 65 | 200 | pA | VO = 0V | 16 |
| Input bias current (TL07xBC, full range) | IB | | | 7 | nA | TA = full range (0°C to 70°C), VO = 0V | 16 |
| Common-mode input voltage range | VCM | -11 | | 11 | V | | 16 |
| Maximum peak output voltage swing | VOM | -12 | 13.5 | 12 | V | RL = 10kΩ | 16 |
| Maximum peak output voltage swing (full range) | VOM | -12 | | 12 | V | RL ≥ 10kΩ, TA = full range | 16 |
| Maximum peak output voltage swing | VOM | -10 | | 10 | V | RL ≥ 2kΩ | 16 |
| Large-signal open-loop voltage gain (25°C) | AOL | 50 | 200 | | V/mV | VO = 0V | 16 |
| Large-signal open-loop voltage gain (full range) | AOL | 25 | | | V/mV | TA = full range | 16 |
| Common-mode rejection ratio | CMRR | 75 | 100 | | dB | VIC = VICR(min), VO = 0V, RS = 50Ω | 16 |
| Supply voltage rejection ratio | PSRR | 80 | 100 | | dB | VS = ±9V to ±18V, VO = 0V, RS = 50Ω | 16 |
| Quiescent current per amplifier | IQ | | 1.4 | 2.5 | mA | VO = 0V, no load | 17 |
| Slew rate | SR | 8 | 20 | | V/μs | VI = 10V, CL = 100pF, RL = 2kΩ | 17 |
| Gain bandwidth product | GBW | | 5.25 | | MHz | all other devices (not NS/PS packages, not TL07xM) | 16 |
| Channel separation (DC) | | | 1 | | µV/V | f = 0Hz | 17 |
| Settling time | tS | | 0.1 | | μs | VI = 20V, CL = 100pF, RL = 2kΩ | 17 |
| Input voltage noise density | eN | | 37 | | nV/√Hz | f = 1kHz, all other devices | 17 |
| Input voltage noise density | eN | | 21 | | nV/√Hz | f = 10kHz, all other devices | 17 |
| Input voltage noise | EN | | 1.4 | | µVRMS | f = 0.1Hz to 10Hz, all other devices | 17 |
| Input current noise | iN | | 10 | | fA/√Hz | RS = 20Ω, f = 1kHz | 17 |
| Phase margin | | | 56 | | ° | G = +1, RL = 10kΩ, CL = 20pF | 17 |
| Overload recovery time | | | 300 | | ns | VIN × gain > VS | 17 |
| Total harmonic distortion + noise | THD+N | | 0.00012 | | % | VS = 40V, VO = 6VRMS, G = +1, f = 1kHz, all other devices | 17 |
| EMI rejection ratio | EMIRR | | 53 | | dB | f = 1GHz, TL07xC/AC/BC/I | 17 |
| Open-loop output impedance | ZO | | 125 | | Ω | f = 1MHz, IO = 0A, TL07xC/AC/BC/I | 17 |
## CAD (KiCad official)
- Symbol: `TL071BCDR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tl071bcdr-etched.step` / `tl071bcdr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tl071bcdr.step` / `tl071bcdr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tl074a) (90 pp, sha256 `ec4a201e6b0fe15d`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tl071bcdr-datasheet.pdf)