component
TL064IPWR
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Texas Instruments FET InputAmplifiers, TSSOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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tl064ipwr: specified limits as data (metadata.characteristics, 27 rows from the datasheet)
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TL064IPWR
Texas Instruments · FET InputAmplifiers · TSSOP-14
TL064IPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OUT | output | Output of op-amp channel 1. Short-circuit protected; can drive to ground or either supply. |
| 2 | 1IN- | input | Inverting (negative) input of op-amp channel 1. High-impedance JFET input; input voltage magnitude must not exceed the supply magnitude or 15 V. |
| 3 | 1IN+ | input | Non-inverting (positive) input of op-amp channel 1. High-impedance JFET input; common-mode range includes VCC+. |
| 4 | VCC+ | power_in | Positive supply rail. Recommended operating range +5 V to +15 V; absolute maximum +18 V. Shared across all four amplifiers. |
| 5 | 2IN+ | input | Non-inverting (positive) input of op-amp channel 2. High-impedance JFET input. |
| 6 | 2IN- | input | Inverting (negative) input of op-amp channel 2. High-impedance JFET input. |
| 7 | 2OUT | output | Output of op-amp channel 2. Short-circuit protected. |
| 8 | 3OUT | output | Output of op-amp channel 3. Short-circuit protected. |
| 9 | 3IN- | input | Inverting (negative) input of op-amp channel 3. High-impedance JFET input. |
| 10 | 3IN+ | input | Non-inverting (positive) input of op-amp channel 3. High-impedance JFET input. |
| 11 | VCC- | power_in | Negative supply rail. Recommended operating range -5 V to -15 V; absolute maximum -18 V. Tie to GND for single-supply operation. Shared across all four amplifiers. |
| 12 | 4IN+ | input | Non-inverting (positive) input of op-amp channel 4. High-impedance JFET input. |
| 13 | 4IN- | input | Inverting (negative) input of op-amp channel 4. High-impedance JFET input. |
| 14 | 4OUT | output | Output of op-amp channel 4. Short-circuit protected. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Op-amp/Cmp |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
TL064IPWRTL064IPWRDTL064IPWRDRTL064IPWRNTL064IPWRNSTL064IPWRNSRTL064IPWRJTL064IPWRWTL064IPWRFK
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage (TA = 25°C) | VIO | 2 | 3 | mV | VO = 0, RS = 50 Ω, TA = 25°C | 7 | |
| Input offset voltage (full range) | VIO | 5 | mV | VO = 0, RS = 50 Ω, TA = Full range | 7 | ||
| Input offset current (TA = 25°C) | IIO | 5 | 100 | pA | VO = 0, TA = 25°C | 7 | |
| Input offset current (full range) | IIO | 3 | nA | VO = 0, TA = Full range | 7 | ||
| Input bias current (TA = 25°C) | IIB | 30 | 200 | pA | VO = 0, TA = 25°C | 7 | |
| Input bias current (full range) | IIB | 7 | nA | VO = 0, TA = Full range | 7 | ||
| Common-mode input voltage range | VICR | -12 | 15 | V | TA = 25°C | 7 | |
| Maximum peak output voltage swing (25°C) | VOM | -10 | 13.5 | V | RL = 10 kΩ, TA = 25°C | 7 | |
| Maximum peak output voltage swing (full range) | VOM | -10 | V | RL ≥ 10 kΩ, TA = Full range | 7 | ||
| Large-signal differential voltage amplification (TA = 25°C) | AVD | 4 | 6 | V/mV | VO = ±10 V, RL ≥ 2 kΩ, TA = 25°C | 7 | |
| Large-signal differential voltage amplification (full range) | AVD | 4 | V/mV | VO = ±10 V, RL ≥ 2 kΩ, TA = Full range | 7 | ||
| Common-mode rejection ratio | CMRR | 80 | 86 | dB | VIC = VICRmin, VO = 0, RS = 50 Ω, TA = 25°C | 7 | |
| Supply-voltage rejection ratio | kSVR | 80 | 95 | dB | VCC = ±9 V to ±15 V, VO = 0, RS = 50 Ω, TA = 25°C | 7 | |
| Total power dissipation (each amplifier) | PD | 6 | 7.5 | mW | VO = 0, No load, TA = 25°C | 7 | |
| Supply current (each amplifier) | ICC | 200 | 250 | µA | VO = 0, No load, TA = 25°C | 7 | |
| Slew rate at unity gain | SR | 1.5 | 3.5 | V/µs | VI = 10 V, CL = 100 pF, RL = 10 kΩ, see Figure 16 | 8 | |
| Supply voltage (positive) | VCC+ | 5 | 15 | V | 5 | ||
| Supply voltage (negative) | VCC– | -5 | -15 | V | 5 | ||
| Ambient temperature (TL06xI grade) | TA | -40 | 85 | °C | TL06xI grade | 5 | |
| Supply voltage (positive, absolute maximum) | VCC+ | 18 | V | 4 | |||
| Supply voltage (negative, absolute maximum) | VCC– | -18 | V | 4 | |||
| Differential input voltage | VID | -30 | 30 | V | Differential voltage at IN+ with respect to IN− | 4 | |
| Input voltage | VI | -15 | 15 | V | Magnitude must not exceed supply voltage magnitude or 15 V, whichever is less | 4 | |
| Operating virtual junction temperature | TJ | 150 | °C | 4 | |||
| Lead temperature (PW package) | 260 | °C | 1.6 mm from case for 10 seconds | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Junction-to-ambient thermal resistance (PW, TSSOP-14) | RθJA | 95 | °C/W | 14-pin PW package | 5 |
CAD (KiCad official)
- Symbol:
TL064IPWR - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
tl064ipwr-etched.step/tl064ipwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tl064ipwr.step/tl064ipwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (52 pp, sha256
1dac0033c568f61f, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TL064IPWR
**Texas Instruments** · FET InputAmplifiers · TSSOP-14
TL064IPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OUT | output | Output of op-amp channel 1. Short-circuit protected; can drive to ground or either supply. |
| 2 | 1IN- | input | Inverting (negative) input of op-amp channel 1. High-impedance JFET input; input voltage magnitude must not exceed the supply magnitude or 15 V. |
| 3 | 1IN+ | input | Non-inverting (positive) input of op-amp channel 1. High-impedance JFET input; common-mode range includes VCC+. |
| 4 | VCC+ | power_in | Positive supply rail. Recommended operating range +5 V to +15 V; absolute maximum +18 V. Shared across all four amplifiers. |
| 5 | 2IN+ | input | Non-inverting (positive) input of op-amp channel 2. High-impedance JFET input. |
| 6 | 2IN- | input | Inverting (negative) input of op-amp channel 2. High-impedance JFET input. |
| 7 | 2OUT | output | Output of op-amp channel 2. Short-circuit protected. |
| 8 | 3OUT | output | Output of op-amp channel 3. Short-circuit protected. |
| 9 | 3IN- | input | Inverting (negative) input of op-amp channel 3. High-impedance JFET input. |
| 10 | 3IN+ | input | Non-inverting (positive) input of op-amp channel 3. High-impedance JFET input. |
| 11 | VCC- | power_in | Negative supply rail. Recommended operating range -5 V to -15 V; absolute maximum -18 V. Tie to GND for single-supply operation. Shared across all four amplifiers. |
| 12 | 4IN+ | input | Non-inverting (positive) input of op-amp channel 4. High-impedance JFET input. |
| 13 | 4IN- | input | Inverting (negative) input of op-amp channel 4. High-impedance JFET input. |
| 14 | 4OUT | output | Output of op-amp channel 4. Short-circuit protected. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Op-amp/Cmp |
| Pins | 14 |
## Ordering variants
Same part, different packaging or reel option.
- `TL064IPWR`
- `TL064IPWRD`
- `TL064IPWRDR`
- `TL064IPWRN`
- `TL064IPWRNS`
- `TL064IPWRNSR`
- `TL064IPWRJ`
- `TL064IPWRW`
- `TL064IPWRFK`
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage (TA = 25°C) | VIO | | 2 | 3 | mV | VO = 0, RS = 50 Ω, TA = 25°C | 7 |
| Input offset voltage (full range) | VIO | | | 5 | mV | VO = 0, RS = 50 Ω, TA = Full range | 7 |
| Input offset current (TA = 25°C) | IIO | | 5 | 100 | pA | VO = 0, TA = 25°C | 7 |
| Input offset current (full range) | IIO | | | 3 | nA | VO = 0, TA = Full range | 7 |
| Input bias current (TA = 25°C) | IIB | | 30 | 200 | pA | VO = 0, TA = 25°C | 7 |
| Input bias current (full range) | IIB | | | 7 | nA | VO = 0, TA = Full range | 7 |
| Common-mode input voltage range | VICR | -12 | | 15 | V | TA = 25°C | 7 |
| Maximum peak output voltage swing (25°C) | VOM | -10 | 13.5 | | V | RL = 10 kΩ, TA = 25°C | 7 |
| Maximum peak output voltage swing (full range) | VOM | -10 | | | V | RL ≥ 10 kΩ, TA = Full range | 7 |
| Large-signal differential voltage amplification (TA = 25°C) | AVD | 4 | 6 | | V/mV | VO = ±10 V, RL ≥ 2 kΩ, TA = 25°C | 7 |
| Large-signal differential voltage amplification (full range) | AVD | 4 | | | V/mV | VO = ±10 V, RL ≥ 2 kΩ, TA = Full range | 7 |
| Common-mode rejection ratio | CMRR | 80 | 86 | | dB | VIC = VICRmin, VO = 0, RS = 50 Ω, TA = 25°C | 7 |
| Supply-voltage rejection ratio | kSVR | 80 | 95 | | dB | VCC = ±9 V to ±15 V, VO = 0, RS = 50 Ω, TA = 25°C | 7 |
| Total power dissipation (each amplifier) | PD | | 6 | 7.5 | mW | VO = 0, No load, TA = 25°C | 7 |
| Supply current (each amplifier) | ICC | | 200 | 250 | µA | VO = 0, No load, TA = 25°C | 7 |
| Slew rate at unity gain | SR | 1.5 | 3.5 | | V/µs | VI = 10 V, CL = 100 pF, RL = 10 kΩ, see Figure 16 | 8 |
| Supply voltage (positive) | VCC+ | 5 | | 15 | V | | 5 |
| Supply voltage (negative) | VCC– | -5 | | -15 | V | | 5 |
| Ambient temperature (TL06xI grade) | TA | -40 | | 85 | °C | TL06xI grade | 5 |
| Supply voltage (positive, absolute maximum) | VCC+ | | | 18 | V | | 4 |
| Supply voltage (negative, absolute maximum) | VCC– | -18 | | | V | | 4 |
| Differential input voltage | VID | -30 | | 30 | V | Differential voltage at IN+ with respect to IN− | 4 |
| Input voltage | VI | -15 | | 15 | V | Magnitude must not exceed supply voltage magnitude or 15 V, whichever is less | 4 |
| Operating virtual junction temperature | TJ | | | 150 | °C | | 4 |
| Lead temperature (PW package) | | | | 260 | °C | 1.6 mm from case for 10 seconds | 4 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| Junction-to-ambient thermal resistance (PW, TSSOP-14) | RθJA | | 95 | | °C/W | 14-pin PW package | 5 |
## CAD (KiCad official)
- Symbol: `TL064IPWR`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `tl064ipwr-etched.step` / `tl064ipwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tl064ipwr.step` / `tl064ipwr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](docs/tl064ipwr-datasheet.pdf) (52 pp, sha256 `1dac0033c568f61f`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tl064ipwr-datasheet.pdf)