main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 18h ago
viewers tl061cdt: viewers · Ray 18h ago
package.json Publish 0.1.0 · Ray 18h ago
page.json Set visibility: public · Ray 18h ago
README.md Initial commit: component/tl061cdt · Ray 18h ago
tl061cdt-etched.glb tl061cdt: factory component page (tier=lcsc) · Ray 18h ago
tl061cdt-etched.step tl061cdt: factory component page (tier=lcsc) · Ray 18h ago
tl061cdt-hero.glb Publish 0.1.0 · Ray 18h ago
tl061cdt-hero.overlay.json Publish 0.1.0 · Ray 18h ago
tl061cdt.glb Publish 0.1.0 · Ray 18h ago
tl061cdt.kicad_mod Publish 0.1.0 · Ray 18h ago
tl061cdt.kicad_sym Publish 0.1.0 · Ray 18h ago
tl061cdt.lbr Publish 0.1.0 · Ray 18h ago
tl061cdt.step Publish 0.1.0 · Ray 18h ago

TL061CDT

STMicroelectronics · FET Input Amplifiers · SO-8

TL061CDT from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Offset null 1 passive Offset null 1 terminal for external null adjustment of input offset voltage.
2 Inverting input input Inverting input terminal with input bias current typically 30 pA at 25°C.
3 Non-inverting input input Non-inverting input terminal; common-mode voltage range ±11.5 to +15/-12 V.
4 VCC- power_in Negative supply terminal (VCC−); supply voltage range 6 to 36 V total.
5 Offset null 2 passive Offset null 2 terminal for external null adjustment of input offset voltage.
6 Output output Output terminal; output voltage swing ±20 V at RL = 10 kΩ, short-circuit protected.
7 VCC+ power_in Positive supply terminal (VCC+); supply voltage range 6 to 36 V total.
8 N.C. unconnected Not connected terminal.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SO-8
Category Amplifiers/Comparators
Pins 8

CAD (KiCad official)

  • Symbol: TL061CDT
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: tl061cdt-etched.step / tl061cdt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl061cdt.step / tl061cdt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (16 pp, sha256 f274f92ac5d7dd4d, retrieved 2026-10-05, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF