component

tl061cdr

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Texas Instruments FET InputAmplifiers, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentop-amp-cmptl061cdr
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Contents

README

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TL061CDR

Texas Instruments · FET InputAmplifiers · SOIC-8

TL061CDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OFFSET N1 passive Offset null pin 1. Connect a potentiometer (typ. 100 kΩ) between OFFSET N1 (pin 1) and OFFSET N2 (pin 5) with the wiper to VCC− to trim input offset voltage to zero.
2 IN- input Inverting input of the op-amp. JFET-input stage with very high input impedance (~10^12 Ω) and low input bias current (30 pA typ. at 25°C).
3 IN+ input Non-inverting input of the op-amp. Common-mode input voltage range is typically ±11 V to +15 V on ±15 V supplies; input bias current 30 pA typ.
4 VCC- power_in Negative supply pin. Accepts −18 V max (absolute maximum); typically −15 V. For single-supply operation, tie to GND.
5 OFFSET N2 passive Offset null pin 2. Connect a potentiometer (typ. 100 kΩ) between OFFSET N1 (pin 1) and OFFSET N2 (pin 5) with the wiper to VCC− to trim input offset voltage to zero. Also used for internal frequency compensation on TL061 (via C1 ≈ 10 pF).
6 OUT output Op-amp output. Short-circuit protected. Peak output swing ±10 V min into RL ≥ 10 kΩ at ±15 V supplies; slew rate 3.5 V/μs typ.
7 VCC+ power_in Positive supply pin. Accepts +18 V max (absolute maximum); typically +15 V. Total supply span (VCC+ − VCC−) up to 36 V.
8 NC unconnected No internal connection. Leave floating or tie to a convenient net; do not use for board routing that would violate creepage.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Op-amp/Cmp
Pins 8

Ordering variants

  • TL061CDR
  • TL061CDRACD
  • TL061CDRACDR
  • TL061CDRCP
  • TL061CDRACP
  • TL061CDRBCP
  • TL061CDRIP
  • TL061CDRCPS
  • TL061CDRACPS

CAD (KiCad official)

  • Symbol: TL061CDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tl061cdr-etched.step / tl061cdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl061cdr.step / tl061cdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 853ae1d40935d156, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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