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TL032ACDR

Public Made by Adom

by adom

Texas Instruments FET Input Amplifiers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Ray tl032acdr: specified limits as data (metadata.characteristics, 36 rows from the datasheet) 49b28c1 14d ago

TL032ACDR

Texas Instruments · FET Input Amplifiers · SOIC-8

TL032ACDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of channel 1; the absolute maximum output current is 40 mA per output.
2 1IN- input Inverting input of channel 1; the absolute maximum input current is ±1 mA per input.
3 1IN+ input Non-inverting input of channel 1; input voltage magnitude must not exceed the supply magnitude or 15 V, whichever is smaller.
4 VCC- power_in Negative power supply; the recommended VCC± supply range is ±5 V to ±15 V.
5 2IN+ input Non-inverting input of channel 2; input voltage magnitude must not exceed the supply magnitude or 15 V, whichever is smaller.
6 2IN- input Inverting input of channel 2; the absolute maximum input current is ±1 mA per input.
7 2OUT output Output of channel 2; the absolute maximum output current is 40 mA per output.
8 VCC+ power_in Positive power supply; the recommended VCC± supply range is ±5 V to ±15 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC+ supply voltage VCC+ 18 V 6
VCC- supply voltage VCC- -18 V 6
Differential input voltage -30 30 V IN+ relative to IN- 6
Input voltage range VI -15 15 V any input; must not exceed supply magnitude or 15 V, whichever is smaller 6
Input current II -1 1 mA per input 6
Output current IO -40 40 mA per output 6
Storage temperature Tstg -65 150 °C 6
Lead temperature (D, N, P or PW package) 260 °C 1.6 mm (1/16 inch) from case for 10 s 6
Supply voltage (dual supply) VCC± 5 15 V C suffix; printed as ±5 V to ±15 V 6
Common-mode input voltage VIC -1.5 4 V VCC± = ±5V 6
Common-mode input voltage VIC -11.5 14 V VCC± = ±15V 6
Operating free-air temperature TA 0 70 °C C suffix; natural convection 6
Input offset voltage VIO 0.53 2.8 mV VO = 0, VIC = 0, RS = 50Ω; VCC± = ±5V; 25°C 11
Input offset voltage VIO 3.8 mV VO = 0, VIC = 0, RS = 50Ω; VCC± = ±5V; full range (0°C to 70°C) 11
Input offset voltage VIO 0.39 1.5 mV VO = 0, VIC = 0, RS = 50Ω; VCC± = ±15V; 25°C 11
Input offset voltage VIO 1.8 mV VO = 0, VIC = 0, RS = 50Ω; VCC± = ±15V; full range (0°C to 70°C) 11
Input offset current IIO 5 100 pA VO = 0, VIC = 0; VCC± = ±5V; 25°C 11
Input offset current IIO 9 200 pA VO = 0, VIC = 0; VCC± = ±5V; 70°C 11
Input offset current IIO 12 200 pA VO = 0, VIC = 0; VCC± = ±15V; 70°C 11
Input bias current IIB 10 200 pA VO = 0, VIC = 0; VCC± = ±5V; 25°C 11
Input bias current IIB 50 400 pA VO = 0, VIC = 0; VCC± = ±5V; 70°C 11
Input bias current IIB 80 400 pA VO = 0, VIC = 0; VCC± = ±15V; 70°C 11
Common-mode input voltage range VICR -1.5 4 V VCC± = ±5V; 25°C 11
Common-mode input voltage range VICR -11.5 14 V VCC± = ±15V; 25°C 11
Maximum positive peak output voltage swing VOM+ 3 4.995 V RL = 10kΩ; VCC± = ±5V; 25°C 11
Maximum positive peak output voltage swing VOM+ 13 14.955 V RL = 10kΩ; VCC± = ±15V; 25°C 11
Maximum negative peak output voltage swing VOM- -4.995 -3 V RL = 10kΩ; VCC± = ±5V; 25°C 11
Maximum negative peak output voltage swing VOM- -14.955 -12.5 V RL = 10kΩ; VCC± = ±15V; 25°C 11
Large-signal differential voltage amplification AVD 72 130 dB RL = 10kΩ; VO = 2.3V (±5V) or ±10V (±15V); VCC± = ±5V; 25°C 11
Large-signal differential voltage amplification AVD 125 dB RL = 10kΩ; VO = 2.3V (±5V) or ±10V (±15V); VCC± = ±5V; 0°C 11
Common-mode rejection ratio CMRR 70 90 dB (VCC−)+3.5V < VIC < (VCC+)−2V; VO = 0; RS = 50Ω; VCC± = ±5V; 25°C 11
Common-mode rejection ratio CMRR 75 94 dB (VCC−)+3.5V < VIC < (VCC+)−2V; VO = 0; RS = 50Ω; VCC± = ±15V; 25°C 11
Supply voltage rejection ratio (ΔVCC±/ΔVIO) kSVR 75 140 dB VO = 0; RS = 50Ω; VCC± = ±5V to ±15V; 25°C 11
Supply current per amplifier ICC 120 250 μA VO = 0; no load; VCC± = ±5V; 25°C 11
Supply current per amplifier ICC 120 280 μA VO = 0; no load; VCC± = ±15V; 25°C 11
Junction-to-ambient thermal resistance (D, 8-pin SOIC) θJA 97 °C/W D package (8-pin SOIC) as listed in thermal table 6

CAD (KiCad official)

  • Symbol: TL032ACDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tl032acdr-etched.step / tl032acdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl032acdr.step / tl032acdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (51 pp, sha256 0193dd09165051c0, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF