# TL031ID

**Texas Instruments** · Pre-ordered Chips · SOIC-8

TL031ID from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OFFSET N1 | passive | Input offset adjustment pin for trimming the input offset voltage; the TL031ID has on-chip offset-voltage trimming to 1.5 mV. |
| 2 | IN- | input | Inverting input of the amplifier. |
| 3 | IN+ | input | Non-inverting input of the amplifier. |
| 4 | VCC- | power_in | Negative power supply; the recommended supply range is ±5 V to ±15 V and the absolute maximum VCC- is −18 V. |
| 5 | OFFSET N2 | passive | Input offset adjustment pin for trimming the input offset voltage, used together with OFFSET N1. |
| 6 | OUT | output | Amplifier output; each output is rated at 40 mA maximum, and the output may be shorted to either supply for unlimited duration at or below 25°C. |
| 7 | VCC+ | power_in | Positive power supply; the absolute maximum VCC+ is 18 V and the recommended supply range is ±5 V to ±15 V. |
| 8 | NC | unconnected | Do not connect. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage VCC+ | VCC+ |  |  | 18 | V |  | 6 |
| Supply voltage VCC− | VCC− | -18 |  |  | V |  | 6 |
| Differential input voltage |  | -30 |  | 30 | V |  | 6 |
| Input voltage range | VI | -15 |  | 15 | V | Any input | 6 |
| Input current | II | -1 |  | 1 | mA | Each input | 6 |
| Output current | IO | -40 |  | 40 | mA | Each output | 6 |
| Lead temperature |  |  |  | 260 | °C | 1.6 mm (1/16 inch) from case for 10 seconds; D, N, P, or PW package | 6 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 6 |
| Supply voltage | VCC± | 5 |  | 15 | V | I suffix (TL031I); printed as ±5 V to ±15 V | 6 |
| Common-mode input voltage | VIC | -1.5 |  | 4 | V | VCC± = ±5V; I suffix | 6 |
| Common-mode input voltage | VIC | -11.5 |  | 14 | V | VCC± = ±15V; I suffix | 6 |
| Operating free-air temperature | TA | -40 |  | 85 | °C | I suffix | 6 |
| Junction-to-ambient thermal resistance | θJA |  | 97 |  | °C/W | D (8-pin SOIC) package | 6 |
| Input offset voltage | VIO |  | 0.54 | 3.5 | mV | VCC± = ±5V; TA = 25°C; VO = 0, VIC = 0, RS = 50Ω | 9 |
| Input offset voltage | VIO |  | 0.5 | 1.5 | mV | VCC± = ±15V; TA = 25°C; VO = 0, VIC = 0, RS = 50Ω | 9 |
| Input offset voltage | VIO |  |  | 5.3 | mV | VCC± = ±5V; full range (−40°C to 85°C); VO = 0, VIC = 0, RS = 50Ω | 9 |
| Input offset voltage | VIO |  |  | 3.3 | mV | VCC± = ±15V; full range (−40°C to 85°C); VO = 0, VIC = 0, RS = 50Ω | 9 |
| Input offset current | IIO |  | 5 | 100 | pA | VCC± = ±5V; 25°C; VO = 0, VIC = 0 | 9 |
| Input offset current | IIO |  | 0.02 | 0.45 | nA | VCC± = ±5V; 85°C; VO = 0, VIC = 0 | 9 |
| Input bias current | IIB |  | 10 | 200 | pA | VCC± = ±5V; 25°C; VO = 0, VIC = 0 | 9 |
| Input bias current | IIB |  | 0.2 | 0.9 | nA | VCC± = ±5V; 85°C; VO = 0, VIC = 0 | 9 |
| Common-mode input voltage range | VICR | -1.5 |  | 4 | V | VCC± = ±5V; 25°C | 9 |
| Common-mode input voltage range | VICR | -11.5 |  | 14 | V | VCC± = ±15V; 25°C | 9 |
| Maximum positive peak output voltage swing | VOM+ | 3 | 4.995 |  | V | VCC± = ±5V; RL = 10kΩ; 25°C | 9 |
| Maximum positive peak output voltage swing | VOM+ | 13 | 14.955 |  | V | VCC± = ±15V; RL = 10kΩ; 25°C | 9 |
| Maximum negative peak output voltage swing | VOM− | -3 | -4.995 |  | V | VCC± = ±5V; RL = 10kΩ; 25°C | 9 |
| Maximum negative peak output voltage swing | VOM− | -12.5 | -14.955 |  | V | VCC± = ±15V; RL = 10kΩ; 25°C | 9 |
| Large-signal differential voltage amplification | AVD | 72 | 130 |  | dB | VCC± = ±5V, VO = ±2.3V; RL = 10kΩ; 25°C | 9 |
| Common-mode rejection ratio | CMRR | 70 | 90 |  | dB | (VCC−) + 3.5V < VIC < (VCC+) − 2V, VO = 0, RS = 50Ω; VCC± = ±5V; 25°C | 9 |
| Common-mode rejection ratio | CMRR | 75 | 94 |  | dB | (VCC−) + 3.5V < VIC < (VCC+) − 2V, VO = 0, RS = 50Ω; VCC± = ±15V; 25°C | 9 |
| Supply-voltage rejection ratio (ΔVCC±/ΔVIO) | kSVR | 75 | 140 |  | dB | VCC± = ±5V; VO = 0, RS = 50Ω; 25°C | 9 |
| Supply current per amplifier | ICC |  | 130 | 250 | μA | VCC± = ±5V; VO = 0, no load; 25°C | 9 |
| Supply current per amplifier | ICC |  | 130 | 280 | μA | VCC± = ±15V; VO = 0, no load; 25°C | 9 |

## CAD (KiCad official)

- Symbol: `TL031ID`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tl031id-etched.step` / `tl031id-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tl031id.step` / `tl031id.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tl031.pdf) (51 pp, sha256 `aa827ac61623280f`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tl031id-datasheet.pdf)