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Contents

README

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TJA1051

NXP · CAN Transceiver · SOIC-8

The TJA1051 is a high-speed CAN transceiver that connects a CAN protocol controller to the physical two-wire bus. It converts the controller's TX/RX logic signals to the differential CANH/CANL bus levels and back, with bus fault protection and low electromagnetic emission. It supports classic CAN and CAN FD data rates up to 5 Mbit/s.

Pinout

Pin Name Type Function
1 TXD input CAN transmit data input from the controller. A LOW level drives the CAN bus to the dominant state; a HIGH level allows the bus to be recessive. Has an internal pull-up to VIO so a floating TXD defaults to recessive. A 'TXD dominant time-out' timer disables the transmitter if TXD stays LOW longer than t_to(dom)TXD, setting a minimum bus rate of ~20 kbit/s.
2 GND power_in Device ground, 0 V reference for all signals. On the HVSON8 (TJA1051TK/3) variant the die supply ground is bonded to both the GND pin and the exposed center pad; both must be soldered to board ground for correct and enhanced thermal operation.
3 VCC power_in Main transceiver supply voltage, 4.5 V to 5.5 V (typ. 5 V). Feeds the CAN bus driver stage. Undervoltage detection at V_uvd(VCC) = 3.5 to 4.5 V disengages the transceiver from the bus (zero load) until VCC recovers.
4 RXD output CAN receive data output; reproduces the logical state of the CAN bus for the controller. LOW when the bus is dominant, HIGH when recessive. Push-pull output referenced to VIO (or VCC on parts without a VIO pin); floats in Off mode on the TJA1051T/E.
5 NC/EN/VIO unconnected Pin 5 function is set by the ordering variant. TJA1051T: not connected (n.c.). TJA1051T/E: EN, active-HIGH enable control input (LOW = Off mode, bus and RXD float); internal pull-down to GND. TJA1051T/3 and TJA1051TK/3: VIO, I/O level-adapter supply (2.8 V to 5.5 V) that sets the logic levels of TXD, RXD and S so the device can interface directly with 3 V-5 V microcontrollers.
6 CANL bidirectional LOW-level CAN bus line. Together with CANH forms the differential ISO 11898-2 bus. Driven LOW in the dominant state and released toward Vcc/2 in the recessive state. Withstands −58 V to +58 V continuous bus voltage and ±8 kV IEC 61000-4-2 ESD.
7 CANH bidirectional HIGH-level CAN bus line. Driven HIGH in the dominant state and released toward Vcc/2 in the recessive state, forming the differential pair with CANL. Withstands −58 V to +58 V continuous bus voltage and ±8 kV IEC 61000-4-2 ESD.
8 S input Silent-mode control input. LOW selects Normal mode (transmitter active); HIGH selects Silent mode (transmitter disabled, bus released to recessive, receiver still active). Internal pull-down to GND so a floating S defaults to Normal mode.

Key specifications

Parameter Value
Type High-speed CAN transceiver
Data rate Up to 5 Mbit/s (CAN FD)
Supply voltage 4.5 V to 5.5 V
Bus pins CANH / CANL (differential)
Standards ISO 11898-2
Features TXD dominant timeout, thermal protection
Operating temperature -40 C to 150 C

Ordering variants

Same part, different packaging or reel option.

  • TJA1051T
  • TJA1051T/E
  • TJA1051T/3
  • TJA1051TK/3

CAD (KiCad official)

  • Symbol: tja1051.kicad_sym
  • Footprint: tja1051.kicad_mod
  • 3D model: SOIC-8 body from KiCad Package_SO/SOIC-8_3.9x4.9mm_P1.27mm.
  • 3D model files: tja1051-etched.step / tja1051-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tja1051.step / tja1051.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: NXP datasheet (25 pp, sha256 6637cd500dda3c1c, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF