component

TJA1044VTK

Public Made by Adom

by adom

NXP Semicon CAN ICs, HVSON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icstja1044vtkfactory-2.0.0extractor-text

Verified TJA1044VTK

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 9 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TJA1044VTK · HVSON-8-EP(3x3) · 9 pins
  • ✓copper: 9 copper pads, none touching another net
  • ✓datasheet: all 9 pin names found in the 28-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: HVSON-8-1EP_3x3mm_P0.65mm_EP1.6x2.4mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-7bno_j_f/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height within the datasheet's package drawing (datasheet p.19)
  • ✓pads: 9 pins = 9 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 9 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tja1044vtk.kicad_sym✓ tja1044vtk.kicad_mod✓ tja1044vtk.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tja1044vtk: hero re-rendered with the chip (after the 10-30 render outage) · Ray 10d ago
viewers tja1044vtk: viewers · Ray 10d ago
package.json Publish 0.1.0 · Ray 10d ago
page.json Set visibility: public · Ray 10d ago
README.md Publish 0.1.0 · Ray 10d ago
tja1044vtk-etched.glb Publish 0.1.0 · Ray 10d ago
tja1044vtk-etched.step tja1044vtk: factory component page (tier=mfr) · Ray 10d ago
tja1044vtk-hero.glb tja1044vtk: hero GLB from the etched model (keeps the MPN mark) · Ray 10d ago
tja1044vtk-hero.overlay.json Publish 0.1.0 · Ray 10d ago
tja1044vtk.glb Publish 0.1.0 · Ray 10d ago
tja1044vtk.kicad_mod Publish 0.1.0 · Ray 10d ago
tja1044vtk.kicad_sym Publish 0.1.0 · Ray 10d ago
tja1044vtk.lbr Publish 0.1.0 · Ray 10d ago
tja1044vtk.step Publish 0.1.0 · Ray 10d ago
verification.json Verified: Published by the parts factory: tier mfr, 9 pins · Ray 10d ago

TJA1044VTK

NXP Semicon · CAN ICs · HVSON-8-EP(3x3)

TJA1044VTK from NXP Semicon, in a HVSON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TXD input Transmit data digital input; a LOW level drives the CAN bus dominant in Normal mode and a HIGH level gives recessive.
2 GND power_in Ground supply; the GND pin must be soldered to board ground, and the exposed center pad is also recommended to be soldered to board ground.
3 VCC power_in Supply voltage pin; in this non-VIO variant the Standby low-power receiver is supplied from VCC.
4 RXD output Receive data digital output that reads out data from the bus lines; in Standby it follows the bus after a wake-up request is detected.
5 n.c. unconnected Not connected in the TJA1044VTK (non-VIO variant); the pin has no internal function and is left unconnected.
6 CANL bidirectional LOW-level CAN bus line (analog input/output) connected to the CAN bus.
7 CANH bidirectional HIGH-level CAN bus line (analog input/output) connected to the CAN bus.
8 STB input Standby mode control digital input; a HIGH level selects Standby mode and a LOW level selects Normal mode.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer NXP Semicon
Package HVSON-8-EP(3x3)
Category Interface ICs
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC supply voltage VCC 4.5 5.5 V 10
voltage on pin x (on pins CANH, CANL) Vx -42 42 V on pins CANH, CANL 9
voltage on pin x (on pin VCC, VIO) Vx -0.3 7 V on pin VCC, VIO 9
voltage on pin x (on any other pin) Vx -0.3 V on any other pin; upper limit printed as VIO + 0.3 (VCC + 0.3 in non-VIO variants) 9
voltage between pin CANH and pin CANL V(CANH-CANL) -27 27 V 9
transient voltage pulse 1 Vtrt -100 V on pins CANH and CANL; pulse 1 9
transient voltage pulse 2a Vtrt 75 V on pins CANH and CANL; pulse 2a 9
transient voltage pulse 3a Vtrt -150 V on pins CANH and CANL; pulse 3a 9
electrostatic discharge voltage (IEC 61000-4-2) VESD -8 8 kV IEC 61000-4-2 (150 pF, 330 Ω discharge circuit) on pins CANH and CANL 9
electrostatic discharge voltage (SAE J2962-2 powered air discharge) VESD -15 15 kV SAE J2962-2:2019 (330 pF, 2kΩ) on pins CANH, CANL; powered air discharge 9
electrostatic discharge voltage (HBM, any pin) VESD -4 4 kV Human Body Model (HBM) on any pin 9
electrostatic discharge voltage (HBM, pins CANH and CANL) VESD -8 8 kV Human Body Model (HBM) on pins CANH and CANL 9
virtual junction temperature Tvj -40 150 °C 9
storage temperature Tstg -55 150 °C 9
standby undervoltage detection voltage on pin VCC Vuvd(stb)(VCC) 3.5 4 4.3 V 10
switch-off undervoltage detection voltage on pin VCC Vuvd(swoff)(VCC) 1.3 2.4 3.4 V TJA1044VT, TJA1044VTK 10
supply current in Standby mode ICC 10 15 μA TJA1044VT, TJA1044VTK; VTXD = VCC 10
supply current in Normal mode, bus recessive ICC 2 5 10 mA recessive; VTXD = VIO 10
supply current in Normal mode, bus dominant ICC 20 45 60 mA dominant; VTXD = 0 V 10
supply current, dominant with short circuit on bus lines ICC 2 80 110 mA dominant; VTXD = 0 V; short circuit on bus lines; -3 V < (VCANH = VCANL) < +18 V 10
HIGH-level input voltage, pin STB VIH 2 V TJA1044VT, TJA1044VTK; max printed as VCC + 0.3 11
LOW-level input voltage, pin STB VIL -0.3 0.8 V TJA1044VT, TJA1044VTK 11
LOW-level input current, pin STB IIL -15 -1 μA VSTB = 0 V 11
HIGH-level input voltage, pin TXD VIH 2 V TJA1044VT, TJA1044VTK; max printed as VCC + 0.3 11
LOW-level input voltage, pin TXD VIL -0.3 0.8 V TJA1044VT, TJA1044VTK 11
LOW-level input current, pin TXD IIL -270 -150 -65 μA VTXD = 0 V; variants without a VIO pin 11
input capacitance Ci 5 10 pF 11
HIGH-level output current, pin RXD IOH -9 -3 -1 mA VRXD = VIO - 0.4 V 11
LOW-level output current, pin RXD IOL 1 12 mA VRXD = 0.4 V; bus dominant 11
dominant output voltage, pin CANH VO(dom) 2.75 3.5 4.5 V VTXD = 0 V; t < tto(dom)TXD; pin CANH; RL = 50 Ω to 65 Ω 11
dominant output voltage, pin CANL VO(dom) 0.5 1.5 2.25 V VTXD = 0 V; t < tto(dom)TXD; pin CANL; RL = 50 Ω to 65 Ω 11
transmitter dominant voltage symmetry Vdom(TX)sym -400 400 mV Vdom(TX)sym = VCC - VCANH - VCANL 12
differential output voltage, dominant VO(dif) 1.5 3 V dominant; Normal mode; VTXD = 0 V; t < tto(dom)TXD; RL = 50 Ω to 65 Ω 12
differential output voltage, dominant VO(dif) 1.4 3.3 V dominant; Normal mode; VTXD = 0 V; t < tto(dom)TXD; RL = 45 Ω to 70 Ω 12
differential output voltage, dominant VO(dif) 1.5 5 V dominant; Normal mode; VTXD = 0 V; t < tto(dom)TXD; RL = 2240 Ω 12
differential output voltage, recessive VO(dif) -50 50 mV Normal mode: VTXD = VIO; no load 12
recessive output voltage VO(rec) 2 3 V Normal mode; VTXD = VIO; no load 12
differential receiver threshold voltage, Normal mode Vth(RX)dif 0.5 0.9 V -12 V ≤ VCANL ≤ +12 V; -12 V ≤ VCANH ≤ +12 V; Normal mode 12
differential receiver threshold voltage, Standby mode Vth(RX)dif 0.4 1.15 V -12 V ≤ VCANL ≤ +12 V; -12 V ≤ VCANH ≤ +12 V; Standby mode 12
receiver recessive voltage, Normal mode Vrec(RX) -4 0.5 V -12 V ≤ VCANL ≤ +12 V; -12 V ≤ VCANH ≤ +12 V; Normal mode 12
receiver dominant voltage, Normal mode Vdom(RX) 0.9 9 V -12 V ≤ VCANL ≤ +12 V; -12 V ≤ VCANH ≤ +12 V; Normal mode 12
receiver dominant voltage, Standby mode Vdom(RX) 1.15 9 V -12 V ≤ VCANL ≤ +12 V; -12 V ≤ VCANH ≤ +12 V; Standby mode 12
differential receiver hysteresis voltage Vhys(RX)dif 50 300 mV -12 V ≤ VCANL ≤ +12 V; -12 V ≤ VCANH ≤ +12 V; Normal mode 12
leakage current IL -5 5 μA VCC = VIO = 0 V or VCC = VIO = shorted to GND via 47 kΩ; VCANH = VCANL = 5 V 13
input resistance Ri 9 15 28 kΩ -2 V ≤ VCANL ≤ +7 V; -2 V ≤ VCANH ≤ +7 V 13
differential input resistance Ri(dif) 19 30 52 kΩ -2 V ≤ VCANL ≤ +7 V; -2 V ≤ VCANH ≤ +7 V 13
delay time from TXD to bus dominant td(TXD-busdom) 65 100 ns Normal mode 14
delay time from TXD to bus recessive td(TXD-busrec) 90 100 ns Normal mode 14
delay time from bus dominant to RXD td(busdom-RXD) 60 140 ns Normal mode 14
delay time from bus recessive to RXD td(busrec-RXD) 65 125 ns Normal mode 14
transmitted recessive bit width deviation Δtbit(bus) -45 10 ns ISO 11898-2:2024 parameter set B (tbit(TXD) ≥ 200 ns, up to 5 Mbit/s); Δtbit(bus) = tbit(bus) - tbit(TXD) 14
received recessive bit width deviation Δtbit(RXD) -80 20 ns ISO 11898-2:2024 parameter set B (tbit(TXD) ≥ 200 ns, up to 5 Mbit/s); Δtbit(RXD) = tbit(RXD) - tbit(TXD) 14
receiver timing symmetry Δtrec -45 15 ns ISO 11898-2:2024 parameter set B (tbit(TXD) ≥ 200 ns, up to 5 Mbit/s); Δtrec = tbit(RXD) - tbit(bus) 14
TXD dominant time-out time tto(dom)TXD 0.8 3 6.5 ms VTXD = 0 V; Normal mode 14
standby to normal mode delay time td(stb-norm) 7 25 47 μs 14
bus dominant wake-up time twake(busdom) 0.5 3 μs Standby mode; TJA1044VT, VTK 14
bus recessive wake-up time twake(busrec) 0.5 3 μs Standby mode; TJA1044VT, VTK 14
bus wake-up time-out time tto(wake)bus 0.8 3 6.5 ms Standby mode 15
thermal resistance from junction to ambient Rth(j-a) 54 K/W HVSON8 package; in free air 10
thermal resistance from junction to case Rth(j-c) 16 K/W HVSON8 package; in free air 10

CAD (KiCad official)

  • Symbol: TJA1044VTK
  • Footprint: Package_SON:HVSON-8-1EP_3x3mm_P0.65mm_EP1.6x2.4mm
  • 3D model: HVSON-8-EP(3x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tja1044vtk-etched.step / tja1044vtk-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tja1044vtk.step / tja1044vtk.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: NXP Semicon datasheet (28 pp, sha256 147efda27c7a0b49, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF