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TJA1042M-3

Public Made by Adom

by adom

HGSEMI CAN Transceivers, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TJA1042M-3

HGSEMI · CAN Transceivers · SOP-8

TJA1042M-3 from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TXD input Transmit data input with an internal pull-up, so the bus stays recessive when TXD is floating; a low level drives the bus dominant, and a TXD dominant timeout (0.3 to 5 ms) releases the bus if TXD is held low.
2 GND power_in Ground reference for the transceiver; all voltages are referenced to this pin.
3 VCC power_in Main supply input, operating range 4.5 to 5.5 V, with undervoltage protection that tri-states the bus outputs when VCC falls below about 3.5 to 4.5 V.
4 RXD output Receive data output that goes high when the bus is recessive and low when the bus is dominant; it is tri-stated when VCC is powered down to prevent reverse current.
5 VIO/SPLIT power_in Dual-function pin: supplies the transceiver I/O level shifter (VIO operating range 2.8 to 5.5 V, allowing 3.3 V MCU interfacing on the TJA1042-3) and also serves as the SPLIT common-mode regulated output at 0.5VCC, which should be tied to the midpoint of the termination in normal mode and left floating in standby.
6 CANL bidirectional Low-level CAN bus line, driven dominant at about 0.5 to 2.25 V with the bus common-mode range of -70 V to +70 V and ±8 kV HBM ESD protection.
7 CANH bidirectional High-level CAN bus line, driven dominant at about 2.75 to 4.5 V with the bus common-mode range of -70 V to +70 V and ±8 kV HBM ESD protection.
8 STB input Standby mode control input with an internal pull-up: low selects normal mode, while high or floating selects low-power standby mode with bus wake-up detection.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package SOP-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC (withstand) VCC -0.3 7 V 可承受耐压 4
Supply voltage VCC (operating range) VCC 4.5 5.5 V 工作范围 4
I/O supply voltage VIO (withstand) VIO -0.3 7 V 可承受耐压 4
I/O supply voltage VIO (operating range) VIO 2.8 5.5 V 工作范围 4
CANH, CANL common-mode voltage VCAN -70 70 V 4
Bus differential voltage Vdiff -27 27 V 4
Electrostatic discharge, human body model VESD -8 8 kV 人体模型 4
Actual junction temperature TVJ -40 150 ℃ 实际结温 4
Storage temperature TSTG -55 150 ℃ 4
Lead temperature (soldering 10 s) TLEAD 245 ℃ 焊接 10s 4
VCC supply current, normal mode recessive ICC 2.5 5 10 mA 正常模式：隐性 VTXD = VIO 5
VCC supply current, normal mode dominant ICC 20 45 70 mA 正常模式：显性 VTXD = 0V 5
VCC supply current, standby mode (TJA1042-3) ICC 0.5 5 µA 待机模式：TJA1042-3 5
VIO supply current, normal mode recessive IIO 80 200 µA 正常模式：隐性 VTXD = VIO 5
VIO supply current, normal mode dominant IIO 350 1000 µA 正常模式：显性 VTXD = 0V 5
VIO supply current, standby mode IIO 12 17 µA 待机模式：VTXD = VIO 5
VCC undervoltage protection threshold Vuvp_VCC 3.5 4.5 V 5
VIO undervoltage protection threshold Vuvp_VIO 1.3 2 2.7 V 5
TXD low-level input voltage VIL -0.3 V 5
TXD high-level input current IIH -5 5 µA VTXD = VIO 5
TXD low-level input current IIL -260 -150 -30 µA 正常模式：VTXD = 0V 5
STB low-level input voltage VIL -0.3 V 5
STB high-level input current IIH -1 1 µA VSTB = VIO 5
STB low-level input current IIL -15 -1 µA VSTB = 0V 5
RXD high-level output current IOH -8 -3 -1 mA 正常模式：VRXD = VIO - 0.4V 5
RXD low-level output current IOL 2 5 12 mA VRXD = 0.4V，总线显性 5
CANH dominant output voltage VOH(D) 2.75 3.5 4.5 V VTXD = 0V 6
CANL dominant output voltage VOL(D) 0.5 1.5 2.25 V VTXD = 0V 6
Bus differential output voltage, dominant VO(D) 1.5 3 V VTXD = 0V 6
Bus differential output voltage, recessive VOD(R) -12 12 mV VTXD = VIO；隐性 45Ω<RL<65Ω 6
Dominant output voltage symmetry Vdom(TX)sym -400 400 mV Vdom(TX)sym = VCC - VCANH - VCANL 6
Common-mode output voltage VOC 2 2.5 3 V VSTB = 0V 6
Difference between dominant and recessive common-mode output voltage △VOC 30 mV 6
Short-circuit output current, dominant (CANH to -12V) IOS -100 -70 mA VCANH = -12V，VCANL = open 6
Short-circuit output current, dominant (CANH at 12V) IOS 0.36 1 mA VCANH = 12V，VCANL = open 6
Short-circuit output current, dominant (CANL at -12V) IOS -1 0.5 mA VCANL = -12V，VCANH = open 6
Short-circuit output current, dominant (CANL at 12V) IOS 70 100 mA VCANL = 12V，VCANH = open 6
Recessive output current IO(R) -5 5 mA 正常模式：VTXD = VIO，-27V< VCAN <32V 6
Transmitter propagation delay, low to high tPLH 90 ns VSTB = 0V 6
Transmitter propagation delay, high to low tPHL 65 ns 6
Standby to normal mode delay td(stb-norm) 47 µs 6
TXD dominant timeout tdom_TXD 0.3 2 5 ms 6
BUS dominant timeout tdom_BUS 0.3 2 5 ms 6
Bus wake-up time twake 0.5 5 µs 6
Positive input threshold voltage VIT+ 500 700 900 mV VSTB = 0V 7
Negative input threshold voltage VIT- 650 mV 7
Input threshold hysteresis VHYS 50 120 200 mV 7
Bus input current, unpowered IO(off) -5 5 µA VCANH or VCANH = 5V, Other pin = 0V 7
CANH, CANL differential input resistance to ground RIN 9 15 28 KΩ VTXD = VIO, VSTB = 0V 7
CANH, CANL differential input resistance RID 19 30 52 KΩ 7
Input resistance mismatch RImatch -1 1 % 7
Common-mode input voltage range VCOM -30 30 V 7
Receiver propagation delay, low to high tPLH 65 ns VSTB = 0V 7
Bit time on BUS pin tbit(BUS) 435 530 ns tbit(TXD) = 500ns 7
Bit time on BUS pin tbit(BUS) 155 210 ns tbit(TXD) = 200ns 7
Bit time on RXD pin tbit(RXD) 400 550 ns tbit(TXD) = 500ns 7
Bit time on RXD pin tbit(RXD) 120 220 ns tbit(TXD) = 200ns 7
Loop delay 1, driver input to receiver output, recessive to dominant Td(LOOP1) 60 220 ns VSTB = 0V；隐性到显性 7
Loop delay 2, driver input to receiver output, dominant to recessive Td(LOOP2) 60 220 ns 显性到隐性 7
Thermal shutdown junction temperature Tj(sd) 190 ℃ 7

CAD (KiCad official)

  • Symbol: TJA1042M-3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: tja1042m-3-etched.step / tja1042m-3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tja1042m-3.step / tja1042m-3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (13 pp, sha256 ea83dd256aba04f9, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF