# THVD8000DDFR

**Texas Instruments** · RS485 Bus Modules · TSOT-23-8

THVD8000DDFR from Texas Instruments, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | R | output | Digital receive data output, with VOH of at least VCC-0.4 V at -4 mA and VOL of at most 0.4 V at 4 mA, and high-impedance when MODE is low-level transmit disabled (driven high in transmit mode disabled). |
| 2 | MODE | input | Digital input selecting transmit/receive mode (low = receive, high = transmit), with an internal 2 MΩ pulldown to GND. |
| 3 | F_SET | input | Analog input for carrier frequency selection using a resistor to GND (1.5 kΩ to 80 kΩ recommended, 125 kHz to 5 MHz carrier). |
| 4 | D | input | Digital driver data input with an internal 2 MΩ pullup to VCC. |
| 5 | GND | power_in | Device ground. |
| 6 | A | bidirectional | Bus I/O port A (complementary to B), with ±18 V DC fault protection and ±16 kV HBM ESD. |
| 7 | B | bidirectional | Bus I/O port B (complementary to A), with ±18 V DC fault protection and ±16 kV HBM ESD. |
| 8 | VCC | power_in | Device power supply, 3 V to 5.5 V recommended operating range (absolute maximum 7 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSOT-23-8 |
| Category | IoT/Communication Modules |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 |  | 7 | V |  | 4 |
| Logic pin input voltage (D, MODE, F_SET) | VL | -0.3 |  | 5.7 | V |  | 4 |
| Voltage at A or B | VA, VB | -18 |  | 18 | V | differential or with respect to GND | 4 |
| Receiver output current | IO | -24 |  | 24 | mA |  | 4 |
| Junction temperature | TJ |  |  | 170 | °C |  | 4 |
| Storage temperature | TSTG | -65 |  | 150 | °C |  | 4 |
| Supply voltage | VCC | 3 |  | 5.5 | V |  | 4 |
| Input differential voltage (A and B) | VID | -7 |  | 12 | V |  | 4 |
| Common-mode voltage (A and B) | VCM | -7 |  | 12 | V |  | 4 |
| High-level input voltage (D and MODE) | VIH | 2 |  |  | V | max printed as VCC | 4 |
| Low-level input voltage (D and MODE) | VIL | 0 |  | 0.8 | V |  | 4 |
| Output current, driver | IO | -60 |  | 60 | mA | driver | 4 |
| Output current, receiver | IO | -4 |  | 4 | mA | receiver | 4 |
| Carrier frequency select resistor | RF_SET | 1.5 |  | 80 | kΩ |  | 4 |
| Carrier frequency select resistor tolerance | ΔRF_SET | -2 |  | 2 | % |  | 4 |
| Recommended load capacitance on F_SET | CF_SET |  |  | 100 | pF |  | 4 |
| Operating ambient temperature | TA | -40 |  | 125 | °C |  | 4 |
| Junction-to-ambient thermal resistance | RθJA |  | 106.6 |  | °C/W | DDF (SOT-23), 8 pins | 5 |
| Junction-to-case (top) thermal resistance | RθJC(top) |  | 38.4 |  | °C/W | DDF (SOT-23), 8 pins | 5 |
| Junction-to-board thermal resistance | RθJB |  | 29.9 |  | °C/W | DDF (SOT-23), 8 pins | 5 |
| Driver differential output voltage magnitude | /VOD/ | 1.5 | 3.5 |  | V | RL = 60Ω, -7V ≤ Vtest ≤ 12V, measured at second pulse | 5 |
| Driver differential output voltage magnitude | /VOD/ | 2 | 4 |  | V | RL = 100Ω, CL = 50pF, measured at second pulse | 5 |
| Steady-state common-mode output voltage | VOC | 1 |  | 3 | V | RL = 60Ω, CL = 50pF | 5 |
| Change in differential driver common-mode output voltage | ΔVOC | -160 |  | 160 | mV | RL = 60Ω, CL = 50pF | 5 |
| Peak-to-peak driver common-mode output voltage | VOC(PP) |  |  | 425 | mV | RL = 60Ω, CL = 50pF, VCC = 3.3V and VCC = 5V | 5 |
| Driver short-circuit output current | IOS | -250 |  | 250 | mA | MODE = VCC, -7V ≤ [VA or VB] ≤ 12V | 5 |
| Minimum carrier frequency | f0 | 125 |  |  | kHz | RF_SET = 77kΩ | 5 |
| Maximum carrier frequency | f0 |  |  | 5 | MHz | RF_SET = 1.5kΩ | 5 |
| Carrier frequency duty-cycle distortion | DCDf0 | -2 |  | 2 | % | measured over entire f0 operating range | 5 |
| Carrier frequency tolerance | Δf0 | -25 |  | 25 | % | measured with RF_SET of ±2% tolerance | 5 |
| Carrier frequency variation from spread-spectrum clock | ΔfSSC | -5 |  | 5 | % | measured over full carrier frequency range | 5 |
| Spread-spectrum clock rate | fSSC |  | 30 |  | kHz |  | 5 |
| Receiver bus input current | II |  | 75 | 125 | µA | MODE = GND, VCC = 0V or 5.5V, VI = 12 V | 6 |
| Receiver bus input current | II |  | -97 | -70 | µA | MODE = GND, VCC = 0V or 5.5V, VI = -7 V | 6 |
| OOK differential swing to detect logic 0 | VMAG_ZERO |  |  | 225 | mV | MODE = GND, full common-mode range, 125kHz | 6 |
| OOK differential swing to detect logic 0 | VMAG_ZERO |  |  | 150 | mV | MODE = GND, full common-mode range, 1MHz | 6 |
| OOK differential swing to detect logic 0 | VMAG_ZERO |  |  | 115 | mV | MODE = GND, full common-mode range, 5MHz | 6 |
| OOK differential swing to detect logic 1 | VMAG_ONE | 20 |  |  | mV | 125kHz | 6 |
| OOK differential swing to detect logic 1 | VMAG_ONE | 10 |  |  | mV | 1MHz | 6 |
| Input current (D, MODE) | IIN | -5 |  | 5 | µA | VO = 0V or VCC | 6 |
| Input current (F_SET) | IIN |  |  | 55 | µA | VO = VCC | 6 |
| Receiver low-level output voltage | VOL |  | 0.2 | 0.4 | V | IOL=4mA | 6 |
| Receiver high-impedance output current | IOZ | -1 |  | 1 | µA | VO = 0V or VCC, MODE = 0 | 6 |
| Supply current, transmit mode | ICC |  | 3.1 | 5 | mA | D = VCC, MODE = VCC, resistor between F_SET and GND, no load | 6 |
| Supply current, receive mode | ICC |  | 4 | 6 | mA | D = VCC, MODE = GND, resistor between F_SET and GND, no load | 6 |
| Thermal shutdown temperature | TSD | 160 | 170 | 185 | °C |  | 6 |
| Thermal shutdown hysteresis | THYS | 11 | 15 |  | °C |  | 6 |
| Chip power dissipation | PDOOK |  | 60 | 80 | mW | MODE = VCC, RL = 60Ω, no CL, f0 = 125kHz, 12.5kHz (25kbps) clock pattern as data | 7 |
| Chip power dissipation | PDOOK |  | 90 | 125 | mW | MODE = VCC, RL = 60Ω, no CL, f0 = 5MHz, 500kHz (1Mbps) clock pattern as data | 7 |
| Driver differential output rise and fall time | tr, tf |  | 10 | 30 | ns | RL = 60Ω, CL = 50pF | 7 |
| Receiver output rise and fall time | tr, tf |  | 1.5 | 16 | ns | CL = 15pF | 7 |
| Transmit to receive mode change delay, OOK mode | tTX-RX_OOK |  |  | 14 | clocks | for all RFSET, worst case of tTX-RX_OOK_ZERO and tTX-RX_OOK_ONE | 7 |
| Receive to transmit mode change delay, OOK mode | tRX-TX_OOK |  |  | 12 | clocks | for all RFSET | 7 |
| Transmit timeout delay | tTX_TIMEOUT | 60 |  | 110 | µs |  | 7 |

## CAD (KiCad official)

- Symbol: `THVD8000DDFR`
- Footprint: `Package_TO_SOT_SMD:TSOT-23-8`
- 3D model: TSOT-23-8 (KiCad packages3D, STEP)
- 3D model files: `thvd8000ddfr-etched.step` / `thvd8000ddfr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `thvd8000ddfr.step` / `thvd8000ddfr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/thvd8000) (28 pp, sha256 `39011d1cbd68679b`, retrieved 2026-10-22, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/thvd8000ddfr-datasheet.pdf)