component
THVD1424RGTR
Public Made by Adomby adom
Texas Instruments RS-485 / RS-422 ICs, VQFN-16(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTHVD1424RGTR
Texas Instruments · RS-485 / RS-422 ICs · VQFN-16(3x3)
THVD1424RGTR from Texas Instruments, in a VQFN-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | R | output | Logic output for RS485 received data. |
| 2 | RE | input | Receiver enable/disable control input with internal pull-up; receiver disabled by default. |
| 3 | DE | input | Driver enable/disable control input with internal pull-down; driver disabled by default. |
| 4 | D | input | Logic input for RS485 data to transmit with internal pull-up; drives bus high by default if driver enabled. |
| 5 | TERM_TX | input | Control input for enabling/disabling 120 Ω on-chip termination resistor on Y/Z driver output pins with internal pull-down; disabled by default. |
| 6 | GND | power_in | Ground connection; thermal pad should be connected to GND for optimal thermal and electrical performance. |
| 7 | TERM_RX | input | Control input for enabling/disabling 120 Ω on-chip termination resistor on A/B receiver input pins with internal pull-down; disabled by default. |
| 8 | SLR | input | Slew rate control input with internal pull-down; logic high enables 500 kbps slow mode, low or floating enables 20 Mbps fast mode. |
| 9 | Y | bidirectional | RS485 differential bus output/input; non-inverting driver output in full duplex or non-inverting shared output/input in half duplex mode. |
| 10 | Z | bidirectional | RS485 differential bus output/input; inverting driver output in full duplex or inverting shared output/input in half duplex mode. |
| 11 | B | input | RS485 receiver inverting input pin in full duplex mode. |
| 12 | A | input | RS485 receiver non-inverting input pin in full duplex mode. |
| 13 | VIO | power_in | Logic supply voltage input with operating range 1.65 V to 5.5 V. |
| 14 | VCC | power_in | Bus supply voltage input with operating range 3 V to 5.5 V. |
| 15 | H/F | input | Half/full duplex mode control input with internal pull-down; logic low selects full duplex mode (default), logic high selects half duplex mode. |
| 16 | NC | unconnected | No connection; pin is not connected internally. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-16(3x3) |
| Category | Interface |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
THVD1424RGTR - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: VQFN-16(3x3) (KiCad packages3D, STEP)
- 3D model files:
thvd1424rgtr-etched.step/thvd1424rgtr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);thvd1424rgtr.step/thvd1424rgtr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (36 pp, sha256
6e850d1244379fca, retrieved 2026-09-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).