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THS7360IPWR
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Texas Instruments Video Amplifiers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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THS7360IPWR
Texas Instruments · Video Amplifiers · TSSOP-20
THS7360IPWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SD1 IN | input | Standard-definition video input for channel 1, with an LPF of 9.5 MHz. |
| 2 | SD2 IN | input | Standard-definition video input for channel 2, with an LPF of 9.5 MHz. |
| 3 | SD3 IN | input | Standard-definition video input for channel 3, with an LPF of 9.5 MHz. |
| 4 | Filter 2 | input | Used in conjunction with Filter 1 to select the low-pass filter on the SF channels (selection truth table on page 11). |
| 5 | VS+ | power_in | Positive power-supply pin; connect to +2.7 V up to +5 V. |
| 6 | Filter 1 | input | Used in conjunction with Filter 2 to select the low-pass filter on the SF channels (selection truth table on page 11). |
| 7 | SF1 IN | input | Component or RGB video input for channel 1 of the selectable-filter channels. |
| 8 | SF2 IN | input | Component or RGB video input for channel 2 of the selectable-filter channels. |
| 9 | SF3 IN | input | Component or RGB video input for channel 3 of the selectable-filter channels. |
| 10 | Bypass SD | input | Logic high bypasses the internal SD channel filters and logic low engages them. |
| 11 | Bypass SF | input | Logic high bypasses the internal SF channel filters and logic low engages them. |
| 12 | SF3 OUT | output | Component or RGB video output for channel 3. |
| 13 | SF2 OUT | output | Component or RGB video output for channel 2. |
| 14 | SF1 OUT | output | Component or RGB video output for channel 1. |
| 15 | Disable SF | input | Logic high disables the SF channels and logic low enables them. |
| 16 | GND | power_in | Ground pin for all internal circuitry. |
| 17 | Disable SD | input | Logic high disables the SD channels and logic low enables them. |
| 18 | SD3 OUT | output | Standard-definition video output for channel 3, with an LPF of 9.5 MHz. |
| 19 | SD2 OUT | output | Standard-definition video output for channel 2, with an LPF of 9.5 MHz. |
| 20 | SD1 OUT | output | Standard-definition video output for channel 1, with an LPF of 9.5 MHz. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Amplifiers/Comparators |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
THS7360IPWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
ths7360ipwr-etched.step/ths7360ipwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ths7360ipwr.step/ths7360ipwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (47 pp, sha256
6cc81ab54b96f9cc, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# THS7360IPWR
**Texas Instruments** · Video Amplifiers · TSSOP-20
THS7360IPWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SD1 IN | input | Standard-definition video input for channel 1, with an LPF of 9.5 MHz. |
| 2 | SD2 IN | input | Standard-definition video input for channel 2, with an LPF of 9.5 MHz. |
| 3 | SD3 IN | input | Standard-definition video input for channel 3, with an LPF of 9.5 MHz. |
| 4 | Filter 2 | input | Used in conjunction with Filter 1 to select the low-pass filter on the SF channels (selection truth table on page 11). |
| 5 | VS+ | power_in | Positive power-supply pin; connect to +2.7 V up to +5 V. |
| 6 | Filter 1 | input | Used in conjunction with Filter 2 to select the low-pass filter on the SF channels (selection truth table on page 11). |
| 7 | SF1 IN | input | Component or RGB video input for channel 1 of the selectable-filter channels. |
| 8 | SF2 IN | input | Component or RGB video input for channel 2 of the selectable-filter channels. |
| 9 | SF3 IN | input | Component or RGB video input for channel 3 of the selectable-filter channels. |
| 10 | Bypass SD | input | Logic high bypasses the internal SD channel filters and logic low engages them. |
| 11 | Bypass SF | input | Logic high bypasses the internal SF channel filters and logic low engages them. |
| 12 | SF3 OUT | output | Component or RGB video output for channel 3. |
| 13 | SF2 OUT | output | Component or RGB video output for channel 2. |
| 14 | SF1 OUT | output | Component or RGB video output for channel 1. |
| 15 | Disable SF | input | Logic high disables the SF channels and logic low enables them. |
| 16 | GND | power_in | Ground pin for all internal circuitry. |
| 17 | Disable SD | input | Logic high disables the SD channels and logic low enables them. |
| 18 | SD3 OUT | output | Standard-definition video output for channel 3, with an LPF of 9.5 MHz. |
| 19 | SD2 OUT | output | Standard-definition video output for channel 2, with an LPF of 9.5 MHz. |
| 20 | SD1 OUT | output | Standard-definition video output for channel 1, with an LPF of 9.5 MHz. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Amplifiers/Comparators |
| Pins | 20 |
## CAD (KiCad official)
- Symbol: `THS7360IPWR`
- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`
- 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `ths7360ipwr-etched.step` / `ths7360ipwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ths7360ipwr.step` / `ths7360ipwr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ths7360) (47 pp, sha256 `6cc81ab54b96f9cc`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ths7360ipwr-datasheet.pdf)