component

THS4505DR

Public Made by Adom

by adom

Texas Instruments Differential OpAmps, SOIC-8. Pinout settled in review by an AI reviewer against the manufacturer's datasheet, KiCad symbol/footprint/3D.

componentoperational amplifier-comparatorths4505drfactory-2.0.0extractor-text

Verified THS4505DR

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: THS4505DR · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 51-page datasheet
  • ✓distributor: lcsc C544352, digikey 296-50531-2-ND, mouser 595-THS4505DR
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-s9_wql3y/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.45)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ths4505dr.kicad_sym✓ ths4505dr.kicad_mod✓ ths4505dr.step
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Contents

README

markdown

THS4505DR

Texas Instruments · Differential OpAmps · SOIC-8

THS4505DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN- input Inverting amplifier input; input common-mode range includes the negative supply rail (-5.7/2.6 V typ at ±5 V), with differential input voltage limited to 4 V.
2 VOCM input Output common-mode voltage control input, biased to midrail by two internal 50-kΩ resistors when floating; decouple with a 0.1-µF or 1-µF capacitor.
3 VS+ power_in Positive power supply: 4.5 V to 15 V single supply or ±5 V to ±7.5 V dual supply, 16.5 V absolute maximum; decouple with 10-µF and 0.1-µF capacitors.
4 VOUT+ output Non-inverting differential output, delivering 130 mA typ differential output current drive into RL = 20 Ω at ±5 V (150 mA absolute maximum output current).
5 VOUT- output Inverting differential output; the differential output swing is ±8 V typ into RL = 1 kΩ at ±5 V.
6 VS- power_in Negative power supply, or ground in single-supply operation; decouple with 10-µF and 0.1-µF capacitors.
7 NC unconnected No internal connection on THS4505 (this pin is the power-down pin on THS4504).
8 VIN+ input Non-inverting amplifier input; input voltage is limited to ±VS (absolute maximum).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Open-loop voltage gain 50 55 dB VS = ±5 V; −40°C to +85°C column 4
Input offset voltage -9 -4 1 mV VS = ±5 V; −40°C to +85°C column 4
Input bias current 4 5.2 µA VS = ±5 V; −40°C to +85°C column 4
Input offset current 0.5 2 µA VS = ±5 V; −40°C to +85°C column 4
Common-mode input range -5.1 2 V VS = ±5 V; −40°C to +85°C column 5
Common-mode rejection ratio 70 80 dB VS = ±5 V; −40°C to +85°C column 5
Differential output voltage swing 7.4 8 V VS = ±5 V; RL = 1 kΩ; −40°C to +85°C column 5
Differential output current drive 100 130 mA VS = ±5 V; RL = 20 Ω; −40°C to +85°C column 5
Minimum gain 0.98 1 V/V VS = ±5 V; −40°C to +85°C column 5
Maximum gain 1 1.02 V/V VS = ±5 V; −40°C to +85°C column 5
Common-mode offset voltage -7.6 -0.4 6.8 mV VS = ±5 V; −40°C to +85°C column 5
Input bias current (VOCM) 100 170 µA VS = ±5 V; VOCM = 2.5 V; −40°C to +85°C column 5
Input voltage range 3.4 4 V VS = ±5 V; −40°C to +85°C column 5
Maximum default voltage 0 0.1 V VS = ±5 V; VOCM left floating; −40°C to +85°C column 5
Minimum default voltage -0.1 0 V VS = ±5 V; VOCM left floating; −40°C to +85°C column 5
Specified operating voltage 5 7.5 V VS = ±5 V table 5
Maximum quiescent current 16 25 mA VS = ±5 V; −40°C to +85°C column 5
Minimum quiescent current 9 16 mA VS = ±5 V; −40°C to +85°C column 5
Power-supply rejection (±PSRR) 70 80 dB VS = ±5 V; −40°C to +85°C column 5
Open-loop voltage gain 49 54 dB VS = 5 V; −40°C to +85°C column 6
Input offset voltage -9 -4 1 mV VS = 5 V; −40°C to +85°C column 6
Input bias current 4 5.2 µA VS = 5 V; −40°C to +85°C column 6
Input offset current 0.5 1.2 µA VS = 5 V; −40°C to +85°C column 6
Common-mode input range -0.1 2 V VS = 5 V; −40°C to +85°C column 7
Common-mode rejection ratio 70 80 dB VS = 5 V; −40°C to +85°C column 7
Differential output voltage swing 2.8 3.3 V VS = 5 V; RL = 1 kΩ, referenced to 2.5 V; −40°C to +85°C column 7
Output current drive 80 110 mA VS = 5 V; RL = 20 Ω; −40°C to +85°C column 7
Minimum gain 0.98 1 V/V VS = 5 V; −40°C to +85°C column 7
Maximum gain 1 1.02 V/V VS = 5 V; −40°C to +85°C column 7
Common-mode offset voltage -5.6 0.4 6.4 mV VS = 5 V; −40°C to +85°C column 7
Input bias current (VOCM) 1 3 µA VS = 5 V; VOCM = 2.5 V; −40°C to +85°C column 7
Input voltage range 1.3 3.7 V VS = 5 V; −40°C to +85°C column 7
Maximum default voltage 2.5 2.6 V VS = 5 V; VOCM left floating; −40°C to +85°C column 7
Minimum default voltage 2.4 2.5 V VS = 5 V; VOCM left floating; −40°C to +85°C column 7
Specified operating voltage 5 15 V VS = 5 V table 7
Maximum quiescent current 14 21 mA VS = 5 V; −40°C to +85°C column 7
Minimum quiescent current 8 14 mA VS = 5 V; −40°C to +85°C column 7
Power-supply rejection (+PSRR) 66 75 dB VS = 5 V; −40°C to +85°C column 7
Dual supply voltage VS 5 7.5 V Dual supply 2
Single supply voltage VS 4.5 5 15 V Single supply 2
Operating free-air temperature TA -40 85 °C 2
Supply voltage VS 16.5 V 2
Output current IO 150 mA 2
Differential input voltage VID 4 V 2
Maximum junction temperature TJ 150 °C 2
Maximum junction temperature, continuous operation TJ 125 °C continuous operation, long-term reliability 2
Storage temperature range Tstg -65 150 °C 2
Lead temperature 300 °C 1,6 mm (1/16 inch) from case for 10 seconds 2
Junction-to-case thermal resistance (D, 8-pin) θJC 38.3 °C/W D (8-pin) package 2
Junction-to-ambient thermal resistance (D, 8-pin) θJA 97.5 °C/W D (8-pin) package; JEDEC standard High-K test PCB 2
Package power rating (D, 8-pin) 1.02 W D (8-pin); TA ≤ +25°C 2
Package power rating (D, 8-pin) 410 mW D (8-pin); TA = +85°C 2

CAD (KiCad official)

  • Symbol: THS4505DR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ths4505dr-etched.step / ths4505dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ths4505dr.step / ths4505dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (51 pp, sha256 96596d8d3caad033, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF