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THS4221DBVR

Public Made by Adom

by adom

Texas Instruments Operational Amplifier, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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THS4221DBVR

Texas Instruments · Operational Amplifier · SOT-23-5

THS4221DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT output Amplifier output, rail-to-rail swing with typical 100 mA output drive.
2 VS− power_in Negative supply, with single-supply operation from 2.7 V to 15 V total across VS+ and VS−.
3 IN+ input Non-inverting input, with common-mode range of VS− + 1.1 V to VS+ − 1.1 V.
4 IN− input Inverting input, with differential input voltage limited to 4 V absolute maximum.
5 VS+ power_in Positive supply, with supply voltage up to 15 V recommended and 16.5 V absolute maximum.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Operational Amplifier/Comparator
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VS 16.5 V 2
Output current IO 100 mA 2
Differential input voltage VID 4 V 2
Maximum junction temperature TJ 150 °C 2
Maximum junction temperature, continuous operation, long term reliability TJ 125 °C 2
Storage temperature range Tstg -65 150 °C 2
Lead temperature 300 °C 1,6 mm (1/16 inch) from case for 10 seconds 2
ESD HBM 2500 V THS4221/5 2
ESD CDM 1500 V 2
ESD MM 150 V THS4221/5 2
Thermal resistance junction to case ΘJC 55 °C/W DBV (5) 2
Thermal resistance junction to ambient ΘJA 255.4 °C/W DBV (5), JEDEC High-K test PCB 2
Supply voltage, dual supply VS+ and VS− -7.5 7.5 V Dual supply, printed ±1.35 to ±7.5 2
Supply voltage, single supply VS+ and VS− 2.7 15 V Single supply 2
Slew rate SR 990 V/µs VS=±5 V, G=−1, VO=±2.5 Vpp, 25°C 3
Slew rate SR 975 V/µs VS=±5 V, G=1, VO=±2.5 Vpp, 25°C 3
Open-loop voltage gain AOL 80 100 dB VS=±5 V, VO=±2 V, 25°C 3
Input offset voltage VIO 3 10 mV VS=±5 V, VCM=0 V, 25°C 3
Input bias current IIB 0.9 3 µA VS=±5 V, VCM=0 V, 25°C 3
Input offset current IIO 100 500 nA VS=±5 V, VCM=0 V, 25°C 3
Common-mode rejection ratio CMRR 74 94 dB VS=±5 V, VCM=±2 V, 25°C 3
Output current (sourcing) IO 92 100 mA VS=±5 V, RL=10 Ω, 25°C 4
Output current (sinking) IO -92 -100 mA VS=±5 V, RL=10 Ω, 25°C 4
Maximum quiescent current IQ 14 18 mA VS=±5 V, per channel, 25°C 4
Power supply rejection (±PSRR) PSRR 62 75 dB VS=±5 V, 25°C 4
Slew rate SR 500 V/µs VS=5 V, G=−1, VO=±2 Vpp, 25°C 5
Slew rate SR 550 V/µs VS=5 V, G=1, VO=±2 Vpp, 25°C 5
Open-loop voltage gain AOL 80 100 dB VS=5 V, VO=1.5 V to 3.5 V, 25°C 5
Input offset voltage VIO 3 10 mV VS=5 V, VCM=2.5 V, 25°C 5
Input bias current IIB 0.9 3 µA VS=5 V, VCM=2.5 V, 25°C 5
Input offset current IIO 100 500 nA VS=5 V, VCM=2.5 V, 25°C 5
Common-mode rejection ratio CMRR 74 96 dB VS=5 V, VCM=1.5 V to 3.5 V, 25°C 5
Output current (sourcing) IO 85 95 mA VS=5 V, RL=10 Ω, 25°C 5
Output current (sinking) IO -85 -95 mA VS=5 V, RL=10 Ω, 25°C 5
Maximum quiescent current IQ 12 15 mA VS=5 V, per channel, 25°C 6
Power supply rejection (±PSRR) PSRR 62 70 dB VS=5 V, 25°C 6
Slew rate SR 120 V/µs VS=3.3 V, G=−1, VO=1.3 V to 2 V, 25°C 7
Slew rate SR 250 V/µs VS=3.3 V, G=1, VO=1.3 V to 2V, 25°C 7
Open-loop voltage gain AOL 80 98 dB VS=3.3 V, VO=1.35 V to 1.95 V, 25°C 7
Input offset voltage VIO 3 10 mV VS=3.3 V, VCM=1.65 V, 25°C 7
Input bias current IIB 0.9 3 µA VS=3.3 V, VCM=1.65 V, 25°C 7
Input offset current IIO 100 500 nA VS=3.3 V, VCM=1.65 V, 25°C 7
Common-mode rejection ratio CMRR 74 92 dB VS=3.3 V, VCM=1.35 V to 1.95 V, 25°C 7
Output current (sourcing) IO 45 50 mA VS=3.3 V, RL=20 Ω, 25°C 7
Output current (sinking) IO -45 -50 mA VS=3.3 V, RL=20 Ω, 25°C 7
Maximum quiescent current IQ 11 13 mA VS=3.3 V, per channel, 25°C 8
Power supply rejection (±PSRR) PSRR 60 65 dB VS=3.3 V, 25°C 8

CAD (KiCad official)

  • Symbol: THS4221DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: ths4221dbvr-etched.step / ths4221dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ths4221dbvr.step / ths4221dbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (49 pp, sha256 ea6e5efd34fed5ee, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF