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Contents

README

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THS4141IDGNR

Texas Instruments · Differential Amplifiers · MSOP-8-EP

THS4141IDGNR from Texas Instruments, in a MSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN− power_in Inverting differential input of the fully differential amplifier; input voltage must stay within ±VCC.
2 VOCM input Output common-mode voltage control input; the output common-mode voltage VOC equals VOCM.
3 VCC+ power_in Positive supply; total supply VCC- to VCC+ is 5 V single supply up to ±15 V dual supply, with an absolute maximum of ±16.5 V.
4 VOUT+ output Non-inverting differential output of the amplifier, with output current rated up to 150 mA absolute maximum.
5 VOUT− output Inverting differential output of the amplifier, with output current rated up to 150 mA absolute maximum.
6 VCC− power_in Negative supply (ground in single-supply operation); total supply VCC- to VCC+ has an absolute maximum of ±16.5 V.
7 NC unconnected No internal connection on the THS4141 (this pin is PD shutdown on the THS4140).
8 VIN+ power_in Non-inverting differential input of the fully differential amplifier; input voltage must stay within ±VCC.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package MSOP-8-EP
Category Amplifiers/Comparators
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage, dual supply (VCC– to VCC+) VCC 2.5 15 V Dual supply 3
Supply voltage, single supply VCC 5 30 V Single supply 3
Operating free-air temperature TA -40 85 °C I suffix 3
Open loop gain 63 67 dB TA = 25°C 3
Open loop gain 60 dB TA = full range 3
Input offset voltage, differential 1 7 mV TA = 25°C 3
Input offset voltage, differential 8.5 mV TA = full range 3
Input offset voltage, referred to VOCM VOS 0.5 8 mV TA = 25°C 3
Input bias current IIB 5.1 15 µA 3
Input offset current IOS 0.1 1 µA TA = full range 3
Common-mode rejection ratio CMRR 75 84 dB TA = full range 4
Common-mode input voltage range VICR -4 4.5 V 4
Output voltage swing, VCC = 5 V 1.2 3.8 V VCC = 5 V; TA = 25°C 4
Output voltage swing, VCC = 5 V 1.3 3.7 V VCC = 5 V; TA = full range 4
Output voltage swing, VCC = ±5 V 3.7 3.9 V VCC = ±5 V; TA = 25°C 4
Output voltage swing, VCC = ±5 V 3.6 V VCC = ±5 V; TA = full range 4
Output voltage swing, VCC = ±15 V 12 12.9 V VCC = ±15 V; TA = 25°C 4
Output voltage swing, VCC = ±15 V 11 V VCC = ±15 V; TA = full range 4
Output current, VCC = 5 V IO 35 45 mA RL = 7Ω; VCC = 5 V; TA = 25°C 4
Output current, VCC = 5 V IO 25 mA RL = 7Ω; VCC = 5 V; TA = full range 4
Output current, VCC = ±5 V IO 45 60 mA RL = 7Ω; VCC = ±5 V; TA = 25°C 4
Output current, VCC = ±5 V IO 35 mA RL = 7Ω; VCC = ±5 V; TA = full range 4
Output current, VCC = ±15 V IO 65 85 mA RL = 7Ω; VCC = ±15 V; TA = 25°C 4
Output current, VCC = ±15 V IO 50 mA RL = 7Ω; VCC = ±15 V; TA = full range 4
Supply voltage range, single supply VCC 4 33 V Single supply 4
Supply voltage range, split supply VCC 2 16.5 V Split supply 4
Quiescent current ICC 13.2 16 mA VCC = ±5 V; TA = 25°C 4
Quiescent current ICC 18 mA VCC = ±5 V; TA = full range 4
Power supply rejection ratio (dc) PSRR 70 90 dB TA = 25°C 4
Power supply rejection ratio (dc) PSRR 65 dB TA = full range 4
Supply voltage, VCC– to VCC+ VCC 16.5 V 2
Output current IO 150 mA 2
Differential input voltage VID 6 V 2
Maximum junction temperature TJ 150 °C 2
Maximum junction temperature, continuous operation, long term reliability 125 °C 2
Storage temperature Tstg -65 150 °C 2
Lead temperature 300 °C 1,6 mm (1/16 inch) from case for 10 seconds 2
ESD rating, HBM 2500 V HBM 2
ESD rating, CDM 1500 V CDM 2
ESD rating, MM 200 V MM 2
Power rating, DGN package 1.71 W TA = 25°C 2
Power rating, DGN package 685 mW TA = 85°C 2
Thermal resistance, junction-to-ambient, DGN package θJA 58.4 °C/W 2
Thermal resistance, junction-to-case, DGN package θJC 4.7 °C/W 2

CAD (KiCad official)

  • Symbol: THS4141IDGNR
  • Footprint: Package_SO:MSOP-8-1EP_3x3mm_P0.65mm_EP1.5x1.8mm
  • 3D model: MSOP-8-EP (KiCad packages3D, STEP)
  • 3D model files: ths4141idgnr-etched.step / ths4141idgnr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ths4141idgnr.step / ths4141idgnr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (39 pp, sha256 3204efc202b29e66, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF