component

THS4032IDR

Public Made by Adom

by adom

Texas Instruments Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentamplifiers-comparatorsths4032idrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

THS4032IDR

Texas Instruments · Operational Amplifier · SOIC-8

THS4032IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Channel 1 amplifier output.
2 1IN- input Channel 1 inverting input.
3 1IN+ input Channel 1 noninverting input.
4 VCC- power_in Negative power supply; recommended dual supply is ±4.5 V to ±16 V and single supply is 9 V to 32 V (negative rail for dual-supply operation).
5 2IN+ input Channel 2 noninverting input.
6 2IN- input Channel 2 inverting input.
7 2OUT output Channel 2 amplifier output.
8 VCC+ power_in Positive power supply; recommended dual supply is ±4.5 V to ±16 V and single supply is 9 V to 32 V, with absolute maximum total supply of 33 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Open-loop gain 93 100 dB RL = 150Ω; VCC = ±15V, VO = ±10V, TA = 25°C 6
Open-loop gain 92 dB RL = 150Ω; VCC = ±15V, VO = ±10V, TA = full range 6
Open-loop gain 90 98 dB RL = 150Ω; VCC = ±5V, VO = ±2.5V, TA = 25°C 6
Open-loop gain 89 dB RL = 150Ω; VCC = ±5V, VO = ±2.5V, TA = full range 6
Input offset voltage VOS 0.3 2 mV RL = 150Ω; VCC = ±5V or ±15V, TA = 25°C 6
Input offset voltage VOS 3 mV RL = 150Ω; VCC = ±5V or ±15V, TA = full range 6
Input bias current IIB 9 20 μA RL = 150Ω; VCC = ±5V or ±15V, TA = 25°C 6
Input bias current IIB 33 μA RL = 150Ω; VCC = ±5V or ±15V, TA = full range 6
Input offset current IOS 30 250 nA RL = 150Ω; VCC = ±5V or ±15V, TA = 25°C 6
Input offset current IOS 400 nA RL = 150Ω; VCC = ±5V or ±15V, TA = full range 6
Common-mode input voltage range VICR 13.5 14.3 V RL = 150Ω; VCC = ±15V 6
Common-mode input voltage range VICR 3.8 4.3 V RL = 150Ω; VCC = ±5V 6
Common-mode rejection ratio CMRR 85 95 dB RL = 150Ω; VCC = ±15V, VICR = ±12V, TA = 25°C 6
Common-mode rejection ratio CMRR 80 dB RL = 150Ω; VCC = ±15V, VICR = ±12V, TA = full range 6
Common-mode rejection ratio CMRR 90 100 dB RL = 150Ω; VCC = ±5V, VICR = ±2.5V, TA = 25°C 6
Common-mode rejection ratio CMRR 85 dB RL = 150Ω; VCC = ±5V, VICR = ±2.5V, TA = full range 6
Output voltage swing VO 12 12.9 V RL = 150Ω; VCC = ±15V, RL = 250Ω 7
Output voltage swing VO 3 3.5 V RL = 150Ω; VCC = ±5V 7
Output current IO 60 200 mA RL = 150Ω; VCC = ±15V, RL = 10Ω 7
Output current IO 50 160 mA RL = 150Ω; VCC = ±5V, RL = 10Ω 7
Supply current (each amplifier) ICC 7.5 10 mA RL = 150Ω; VCC = ±15V, TA = 25°C 7
Supply current (each amplifier) ICC 11 mA RL = 150Ω; VCC = ±15V, TA = full range 7
Supply current (each amplifier) ICC 6.5 9 mA RL = 150Ω; VCC = ±5V, TA = 25°C 7
Supply current (each amplifier) ICC 10.5 mA RL = 150Ω; VCC = ±5V, TA = full range 7
Power-supply rejection ratio PSRR 85 95 dB RL = 150Ω; VCC = ±5V or ±15V, TA = 25°C 7
Power-supply rejection ratio PSRR 80 dB RL = 150Ω; VCC = ±5V or ±15V, TA = full range 7
Unity gain bandwidth 100 120 MHz RL = 1kΩ; VCC = ±15V, closed loop 8
Slew rate SR 80 100 V/μs RL = 1kΩ 8
Open-loop gain 93 100 dB RL = 1kΩ; VCC = ±15V, VO = ±10V, TA = 25°C 8
Open-loop gain 92 dB RL = 1kΩ; VCC = ±15V, VO = ±10V, TA = full range 8
Open-loop gain 92 98 dB RL = 1kΩ; VCC = ±5V, VO = ±2.5V, TA = 25°C 8
Open-loop gain 91 dB RL = 1kΩ; VCC = ±5V, VO = ±2.5V, TA = full range 8
Input offset voltage VOS 0.3 2 mV RL = 1kΩ; VCC = ±5V or ±15V, TA = 25°C 8
Input offset voltage VOS 3 mV RL = 1kΩ; VCC = ±5V or ±15V, TA = full range 8
Input bias current IIB 9 20 μA RL = 1kΩ; VCC = ±5V or ±15V, TA = 25°C 8
Input offset current IOS 30 250 nA RL = 1kΩ; VCC = ±5V or ±15V, TA = 25°C 8
Common-mode input voltage range VICR 13.5 14.3 V RL = 1kΩ; VCC = ±15V 8
Output voltage swing VO 13 13.6 V RL = 1kΩ; VCC = ±15V 9
Output voltage swing VO 3.4 3.8 V RL = 1kΩ; VCC = ±5V 9
Supply current (each amplifier) ICC 7.5 10 mA RL = 1kΩ; VCC = ±15V, TA = 25°C 9
Supply current (each amplifier) ICC 11 mA RL = 1kΩ; VCC = ±15V, TA = full range 9
Supply current (each amplifier) ICC 6.5 9 mA RL = 1kΩ; VCC = ±5V, TA = 25°C 9
Supply current (each amplifier) ICC 10 mA RL = 1kΩ; VCC = ±5V, TA = full range 9
Supply voltage VCC– to VCC+ 33 V 4
Output current IO 240 mA 4
Differential input voltage VIO -1.5 1.5 V 4
Continuous input current IIN 10 mA 4
Operating free-air temperature TA -40 85 °C I-suffix 4
Junction temperature TJ 150 °C Any condition 4
Junction temperature TJ 130 °C Maximum junction temperature, continuous operation, long term reliability 4
Lead temperature 300 °C 1,6 mm (1/16 inch) from case for 10 seconds 4
Storage temperature Tstg -65 150 °C 4
Supply voltage (dual-supply) VCC 4.5 15 16 V Dual-supply 4
Supply voltage (single-supply) VCC 9 30 32 V Single-supply 4
Operating free-air temperature TA -40 25 85 °C I-suffix 4
Junction-to-ambient thermal resistance (D SOIC) RθJA 120.6 °C/W THS4032, D (SOIC) 8 pins 5
Junction-to-case (top) thermal resistance (D SOIC) RθJC(top) 62.7 °C/W THS4032, D (SOIC) 8 pins 5
Junction-to-board thermal resistance (D SOIC) RθJB 63.9 °C/W THS4032, D (SOIC) 8 pins 5
Junction-to-top characterization parameter (D SOIC) ΨJT 16.2 °C/W THS4032, D (SOIC) 8 pins 5
Junction-to-board characterization parameter (D SOIC) ΨJB 62.2 °C/W THS4032, D (SOIC) 8 pins 5

CAD (KiCad official)

  • Symbol: THS4032IDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ths4032idr-etched.step / ths4032idr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ths4032idr.step / ths4032idr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (42 pp, sha256 06871dc49415b320, retrieved 2026-10-10, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF