component
TF2388M-TGH
Public Made by Adomby adom
TFSS Gate Drivers, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TF2388M-TGH
TFSS · Gate Drivers · SOIC-20-300mil
TF2388M-TGH from TFSS, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HIN1 | input | Logic input for high-side gate driver output HO1, in phase with HO1, with a recommended input range of 0 V to 5 V and a 2.4 V minimum amplitude for optimal operation. |
| 2 | LIN1 | input | Logic input for low-side gate driver output LO1, in phase with LO1, with a recommended input range of 0 V to 5 V and a 2.4 V minimum amplitude for optimal operation. |
| 3 | HIN2 | input | Logic input for high-side gate driver output HO2, in phase with HO2, with a recommended input range of 0 V to 5 V and a 2.4 V minimum amplitude for optimal operation. |
| 4 | LIN2 | input | Logic input for low-side gate driver output LO2, in phase with LO2, with a recommended input range of 0 V to 5 V and a 2.4 V minimum amplitude for optimal operation. |
| 5 | HIN3 | input | Logic input for high-side gate driver output HO3, in phase with HO3, with a recommended input range of 0 V to 5 V and a 2.4 V minimum amplitude for optimal operation. |
| 6 | LIN3 | input | Logic input for low-side gate driver output LO3, in phase with LO3, with a recommended input range of 0 V to 5 V and a 2.4 V minimum amplitude for optimal operation. |
| 7 | LO3 | output | Low-side gate driver output for phase 3, rated for 420 mA source and 750 mA sink pulsed current (PW ≤ 10 ms) and referenced to COM. |
| 8 | VS3 | power_in | High-side floating supply return for phase 3, with offset between VB-24 V and VB+0.3 V and logic operational for VS of -5 V to +600 V. |
| 9 | HO3 | output | High-side gate driver output for phase 3, swinging between VS3 and VB3 (VHO range VS-0.3 V to VB+0.3 V). |
| 10 | VB3 | power_in | High-side floating supply for phase 3, recommended at VS+10 V to VS+20 V with an absolute maximum of +624 V. |
| 11 | GND | power_in | Low-side driver and logic return. |
| 12 | VCC | power_in | Low-side and logic fixed supply, recommended at 10 V to 20 V with an absolute maximum of +24 V; undervoltage lockout shuts down all drivers. |
| 13 | LO2 | output | Low-side gate driver output for phase 2, rated for 420 mA source and 750 mA sink pulsed current (PW ≤ 10 ms) and referenced to COM. |
| 14 | VS2 | power_in | High-side floating supply return for phase 2, with offset between VB-24 V and VB+0.3 V and logic operational for VS of -5 V to +600 V. |
| 15 | HO2 | output | High-side gate driver output for phase 2, swinging between VS2 and VB2 (VHO range VS-0.3 V to VB+0.3 V). |
| 16 | VB2 | power_in | High-side floating supply for phase 2, recommended at VS+10 V to VS+20 V with an absolute maximum of +624 V. |
| 17 | LO1 | output | Low-side gate driver output for phase 1, rated for 420 mA source and 750 mA sink pulsed current (PW ≤ 10 ms) and referenced to COM. |
| 18 | VS1 | power_in | High-side floating supply return for phase 1, with offset between VB-24 V and VB+0.3 V and logic operational for VS of -5 V to +600 V. |
| 19 | HO1 | output | High-side gate driver output for phase 1, swinging between VS1 and VB1 (VHO range VS-0.3 V to VB+0.3 V). |
| 20 | VB1 | power_in | High-side floating supply for phase 1, recommended at VS+10 V to VS+20 V with an absolute maximum of +624 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TFSS |
| Package | SOIC-20-300mil |
| Category | Motor Driver ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic input high threshold (printed 'Logic 0 input voltage') | VIH | 2.4 | V | NOTE5 | 6 | ||
| Logic input low threshold (printed 'Logic 1 input voltage') | VIL | 0.8 | V | 6 | |||
| High level output voltage, VBIAS - VO | VOH | 0.2 | 0.5 | V | IO = 2mA | 6 | |
| Low level output voltage, VO | VOL | 0.07 | 0.2 | V | IO = 2mA | 6 | |
| Offset supply leakage current | ILK | 10 | mA | VB = VS = 600V | 6 | ||
| Quiescent VBS supply current | IBSQ | 50 | 80 | VIN = 0V or 5V | 6 | ||
| Operating VBS supply current | IBSO | 400 | fs = 20khz | 6 | |||
| Quiescent VCC supply current | ICCQ | 230 | 330 | VIN = 0V or 5V | 6 | ||
| Operating VCC supply current | ICCO | 500 | fs = 20khz | 6 | |||
| Logic '1' input bias current | IIN+ | 25 | 80 | VIN = 5V | 6 | ||
| Logic '0' input bias current | IIN- | 2 | VIN = 0V | 6 | |||
| VBS supply under-voltage positive going threshold | VBSUV+ | 7.1 | 8.5 | 9.9 | V | 6 | |
| VCC supply under-voltage positive going threshold | VCCUV+ | 7.1 | 8.5 | 9.9 | V | 6 | |
| VBS supply under-voltage negative going threshold | VBSUV- | 6.7 | 8.1 | 9.5 | V | 6 | |
| VCC supply under-voltage negative going threshold | VCCUV- | 6.7 | 8.1 | 9.5 | V | 6 | |
| Output high short circuit pulsed current | IO+ | 270 | 420 | mA | VO = 0V, PW <= 10 ms | 6 | |
| Output low short circuit pulsed current | IO- | 600 | 750 | mA | VO = 15V, PW <= 10 ms | 6 | |
| Turn-on propagation delay | ton | 70 | 120 | 170 | ns | VS = 0V | 7 |
| Turn-off propagation delay | toff | 70 | 120 | 170 | ns | VS = 0V | 7 |
| Turn-on rise time | tr | 45 | 75 | ns | VS = 0V | 7 | |
| Turn-off fall time | tf | 25 | 40 | ns | 7 | ||
| Delay matching | tDM | 50 | ns | 7 | |||
| Deadtime | tDT | 200 | 315 | 430 | ns | 7 | |
| Deadtime matching | tDTM | 50 | ns | 7 | |||
| High side floating supply offset voltage | VS | 600 | V | NOTE3: logic operational for VS of -5V to +600V | 5 | ||
| Low side fixed supply voltage | VCC | 10 | 20 | V | 5 | ||
| Logic input voltage (HIN and LIN) | VIN | 0 | 5 | V | 5 | ||
| Ambient temperature | TA | -40 | 125 | °C | 5 | ||
| High-side floating supply voltage (absolute) | VB | -0.3 | 624 | V | 5 | ||
| Offset supply voltage transient | dVS/dt | 50 | V/ns | 5 | |||
| Low-side fixed supply voltage (absolute) | VCC | -0.3 | 24 | V | 5 | ||
| Logic input voltage (HIN and LIN) (absolute) | VIN | -0.3 | 5.5 | V | 5 | ||
| Junction operating temperature | TJ | 150 | °C | 5 | |||
| Lead temperature (soldering, 10 seconds) | TL | 300 | °C | 10 seconds | 5 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 5 | ||
| Input pull-down resistance | RIN | 200 | kW | 6 |
CAD (KiCad official)
- Symbol:
TF2388M-TGH - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
tf2388m-tgh-etched.step/tf2388m-tgh-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tf2388m-tgh.step/tf2388m-tgh.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TFSS datasheet (9 pp, sha256
ecf09079dade189d, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TF2388M-TGH
**TFSS** · Gate Drivers · SOIC-20-300mil
TF2388M-TGH from TFSS, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HIN1 | input | Logic input for high-side gate driver output HO1, in phase with HO1, with a recommended input range of 0 V to 5 V and a 2.4 V minimum amplitude for optimal operation. |
| 2 | LIN1 | input | Logic input for low-side gate driver output LO1, in phase with LO1, with a recommended input range of 0 V to 5 V and a 2.4 V minimum amplitude for optimal operation. |
| 3 | HIN2 | input | Logic input for high-side gate driver output HO2, in phase with HO2, with a recommended input range of 0 V to 5 V and a 2.4 V minimum amplitude for optimal operation. |
| 4 | LIN2 | input | Logic input for low-side gate driver output LO2, in phase with LO2, with a recommended input range of 0 V to 5 V and a 2.4 V minimum amplitude for optimal operation. |
| 5 | HIN3 | input | Logic input for high-side gate driver output HO3, in phase with HO3, with a recommended input range of 0 V to 5 V and a 2.4 V minimum amplitude for optimal operation. |
| 6 | LIN3 | input | Logic input for low-side gate driver output LO3, in phase with LO3, with a recommended input range of 0 V to 5 V and a 2.4 V minimum amplitude for optimal operation. |
| 7 | LO3 | output | Low-side gate driver output for phase 3, rated for 420 mA source and 750 mA sink pulsed current (PW ≤ 10 ms) and referenced to COM. |
| 8 | VS3 | power_in | High-side floating supply return for phase 3, with offset between VB-24 V and VB+0.3 V and logic operational for VS of -5 V to +600 V. |
| 9 | HO3 | output | High-side gate driver output for phase 3, swinging between VS3 and VB3 (VHO range VS-0.3 V to VB+0.3 V). |
| 10 | VB3 | power_in | High-side floating supply for phase 3, recommended at VS+10 V to VS+20 V with an absolute maximum of +624 V. |
| 11 | GND | power_in | Low-side driver and logic return. |
| 12 | VCC | power_in | Low-side and logic fixed supply, recommended at 10 V to 20 V with an absolute maximum of +24 V; undervoltage lockout shuts down all drivers. |
| 13 | LO2 | output | Low-side gate driver output for phase 2, rated for 420 mA source and 750 mA sink pulsed current (PW ≤ 10 ms) and referenced to COM. |
| 14 | VS2 | power_in | High-side floating supply return for phase 2, with offset between VB-24 V and VB+0.3 V and logic operational for VS of -5 V to +600 V. |
| 15 | HO2 | output | High-side gate driver output for phase 2, swinging between VS2 and VB2 (VHO range VS-0.3 V to VB+0.3 V). |
| 16 | VB2 | power_in | High-side floating supply for phase 2, recommended at VS+10 V to VS+20 V with an absolute maximum of +624 V. |
| 17 | LO1 | output | Low-side gate driver output for phase 1, rated for 420 mA source and 750 mA sink pulsed current (PW ≤ 10 ms) and referenced to COM. |
| 18 | VS1 | power_in | High-side floating supply return for phase 1, with offset between VB-24 V and VB+0.3 V and logic operational for VS of -5 V to +600 V. |
| 19 | HO1 | output | High-side gate driver output for phase 1, swinging between VS1 and VB1 (VHO range VS-0.3 V to VB+0.3 V). |
| 20 | VB1 | power_in | High-side floating supply for phase 1, recommended at VS+10 V to VS+20 V with an absolute maximum of +624 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TFSS |
| Package | SOIC-20-300mil |
| Category | Motor Driver ICs |
| Pins | 20 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic input high threshold (printed 'Logic 0 input voltage') | VIH | 2.4 | | | V | NOTE5 | 6 |
| Logic input low threshold (printed 'Logic 1 input voltage') | VIL | | | 0.8 | V | | 6 |
| High level output voltage, VBIAS - VO | VOH | | 0.2 | 0.5 | V | IO = 2mA | 6 |
| Low level output voltage, VO | VOL | | 0.07 | 0.2 | V | IO = 2mA | 6 |
| Offset supply leakage current | ILK | | | 10 | mA | VB = VS = 600V | 6 |
| Quiescent VBS supply current | IBSQ | | 50 | 80 | | VIN = 0V or 5V | 6 |
| Operating VBS supply current | IBSO | | | 400 | | fs = 20khz | 6 |
| Quiescent VCC supply current | ICCQ | | 230 | 330 | | VIN = 0V or 5V | 6 |
| Operating VCC supply current | ICCO | | | 500 | | fs = 20khz | 6 |
| Logic '1' input bias current | IIN+ | | 25 | 80 | | VIN = 5V | 6 |
| Logic '0' input bias current | IIN- | | | 2 | | VIN = 0V | 6 |
| VBS supply under-voltage positive going threshold | VBSUV+ | 7.1 | 8.5 | 9.9 | V | | 6 |
| VCC supply under-voltage positive going threshold | VCCUV+ | 7.1 | 8.5 | 9.9 | V | | 6 |
| VBS supply under-voltage negative going threshold | VBSUV- | 6.7 | 8.1 | 9.5 | V | | 6 |
| VCC supply under-voltage negative going threshold | VCCUV- | 6.7 | 8.1 | 9.5 | V | | 6 |
| Output high short circuit pulsed current | IO+ | | 270 | 420 | mA | VO = 0V, PW <= 10 ms | 6 |
| Output low short circuit pulsed current | IO- | | 600 | 750 | mA | VO = 15V, PW <= 10 ms | 6 |
| Turn-on propagation delay | ton | 70 | 120 | 170 | ns | VS = 0V | 7 |
| Turn-off propagation delay | toff | 70 | 120 | 170 | ns | VS = 0V | 7 |
| Turn-on rise time | tr | | 45 | 75 | ns | VS = 0V | 7 |
| Turn-off fall time | tf | | 25 | 40 | ns | | 7 |
| Delay matching | tDM | | | 50 | ns | | 7 |
| Deadtime | tDT | 200 | 315 | 430 | ns | | 7 |
| Deadtime matching | tDTM | | | 50 | ns | | 7 |
| High side floating supply offset voltage | VS | | | 600 | V | NOTE3: logic operational for VS of -5V to +600V | 5 |
| Low side fixed supply voltage | VCC | 10 | | 20 | V | | 5 |
| Logic input voltage (HIN and LIN) | VIN | 0 | | 5 | V | | 5 |
| Ambient temperature | TA | -40 | | 125 | °C | | 5 |
| High-side floating supply voltage (absolute) | VB | -0.3 | | 624 | V | | 5 |
| Offset supply voltage transient | dVS/dt | | | 50 | V/ns | | 5 |
| Low-side fixed supply voltage (absolute) | VCC | -0.3 | | 24 | V | | 5 |
| Logic input voltage (HIN and LIN) (absolute) | VIN | -0.3 | | 5.5 | V | | 5 |
| Junction operating temperature | TJ | | | 150 | °C | | 5 |
| Lead temperature (soldering, 10 seconds) | TL | | | 300 | °C | 10 seconds | 5 |
| Storage temperature | Tstg | -55 | | 150 | °C | | 5 |
| Input pull-down resistance | RIN | | 200 | | kW | | 6 |
## CAD (KiCad official)
- Symbol: `TF2388M-TGH`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `tf2388m-tgh-etched.step` / `tf2388m-tgh-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tf2388m-tgh.step` / `tf2388m-tgh.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [TFSS datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588944393529675776) (9 pp, sha256 `ecf09079dade189d`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tf2388m-tgh-datasheet.pdf)