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TF21844M-TUH

Public Made by Adom

by adom

TFSS Gate Drivers, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TF21844M-TUH

TFSS · Gate Drivers · SOIC-14

TF21844M-TUH from TFSS, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN input Logic input for high-side and low-side gate driver outputs (HO and LO), in phase with HO, referenced to VSS, with 2.5V minimum VIH and 0.8V maximum VIL.
2 SD* input Logic input for shutdown, referenced to VSS, enabled low (2.5V positive-going and 0.8V negative-going thresholds).
3 VSS power_in Logic ground, with operating range of -5V to +5V relative to COM.
4 DT passive Programmable deadtime lead referenced to VSS, set by an external resistor RDT (about 400ns at 0 ohm, 5us at 200k ohm).
5 COM power_in Low-side return.
6 LO output Low-side gate drive output, 1.4A source / 1.8A sink capability, swinging from COM to VCC.
7 VCC power_in Low-side and logic fixed supply, recommended 10V to 20V (absolute maximum 24V).
8 NC unconnected No connect.
9 NC unconnected No connect.
10 NC unconnected No connect.
11 VS power_in High-side floating supply return, operating up to 600V offset.
12 HO output High-side gate drive output, 1.4A source / 1.8A sink capability, swinging from VS to VB.
13 VB power_in High-side floating supply, recommended VS+10V to VS+20V (absolute maximum 624V).
14 NC unconnected No connect.

Key specifications

Parameter Value
Manufacturer TFSS
Package SOIC-14
Category Motor Driver ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Logic input voltage (IN and SD*) VIH 5 V 3
Logic and low side fixed supply voltage VCC 10 20 V 3
Low side output voltage VLO 0 V Max is VCC (symbolic) 3
High side floating supply offset voltage VS 600 V NOTE3 Logic operational for VS of -5V to 600V 3
Logic ground VSS -5 5 V 3
Ambient temperature TA -40 125 °C 3
VB - High side floating supply voltage VB -0.3 624 V 3
Offset supply voltage transient dVS/dt 50 V/ns 3
Logic and low side fixed supply voltage (absolute) VCC -0.3 24 V 3
Low side output voltage (absolute) VLO -0.3 V Max is VCC+0.3 (symbolic) 3
Package power dissipation, SOIC-14 PD 1 W TA ≤ 25 °C 3
Junction operating temperature TJ 150 °C 3
Lead temperature (soldering) TL 300 °C 10 s 3
Storage temperature range Tstg -55 150 °C 3
Logic '1' input voltage for HO & logic '0' for LO VIH 2.5 V VCC = 10 V to 20 V (NOTE5) 4
Logic '0' input voltage for HO & logic '1' for LO VIL 0.8 V 4
SD* input positive going threshold VSD, TH+ 2.5 V 4
SD* input negative going threshold VSD, TH- 0.8 V 4
High level output voltage, VBIAS - VO VOH 1.4 V IO = 0A 4
Low level output voltage VOL 0.2 V IO = 20mA 4
Offset supply leakage current ILK 50 mA VB = VS = 600V 4
Quiescent VBS supply current IBSO 20 60 150 VIN = 0V or 5V 4
Quiescent VCC supply current ICCQ 0.4 1 1.8 mA VIN = 0V or 5V 4
Logic '1' input bias current IIN+ 25 60 mA IN = 5V, SD* = 0V 4
Logic '0' input bias current IIN- 1 IN = 0V, SD* = 5V 4
VBS supply under-voltage positive going threshold VBSUV+ 8 8.9 9.8 V 4
VBS supply under-voltage negative going threshold VBSUV- 7.4 8.2 9 V 4
VCC supply under-voltage positive going threshold VCCUV+ 8 8.9 9.8 V 4
VCC supply under-voltage negative going threshold VCCUV- 7.4 8.2 9 V 4
Output high short circuit pulsed current IO+ 1.4 1.9 A VO = 0V, PW ≤ 10 ms 4
Output low short circuit pulsed current IO- 1.7 2.3 A VO = 15V, PW ≤ 10 ms 4
Turn-on propagation delay tON 680 900 ns VS = 0V 5
Turn-off propagation delay tOFF 270 400 ns VS = 0 V or 600V 5
Shut-down propagation delay tSD 180 270 ns 5
ON delay matching, HS & LS turn-on tDM ON 90 ns 5
OFF delay matching, HS & LS turn-off tDM OFF 40 ns 5
Turn-on rise time tr 40 60 ns VS = 0V 5
Turn-off fall time tf 20 35 ns 5
Deadtime tDT LO-HO & tDT HO-LO tDT 280 400 520 ns RDT =0W 5
Deadtime tDT LO-HO & tDT HO-LO tDT 4 5 6 ms RDT= 200kW 5
Deadtime matching tMDT = tDT LO-HO - tDT HO-LO tMDT 0 50 ns RDT =0W 5
Deadtime matching tMDT = tDT LO-HO - tDT HO-LO tMDT 0 600 ns RDT= 200kW 5

CAD (KiCad official)

  • Symbol: TF21844M-TUH
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: tf21844m-tuh-etched.step / tf21844m-tuh-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tf21844m-tuh.step / tf21844m-tuh.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TFSS datasheet (10 pp, sha256 44670a94be52bbf5, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF