# TF21844-3BS

**TFSS** · Gate Drivers · PDIP-14

TF21844-3BS from TFSS, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Logic input for high-side and low-side gate driver outputs (HO and LO), in phase with HO, referenced to VSS, with Schmitt trigger and internal pull-down. |
| 2 | SD* | input | Logic input for shutdown, referenced to VSS, enabled low. |
| 3 | VSS | power_in | Logic ground; logic supply offset voltage -5V to +5V relative to COM. |
| 4 | DT | passive | Programmable deadtime lead referenced to VSS; an external resistor sets dead time (about 400ns at RDT=0 ohm, 5us at 200k ohm). |
| 5 | COM | power_in | Low-side return. |
| 6 | LO | output | Low-side gate drive output, 1.4A source / 1.8A sink capability. |
| 7 | VCC | power_in | Low-side and logic fixed supply, 10V to 20V recommended operating range. |
| 8 | NC | unconnected | No connect. |
| 9 | NC | unconnected | No connect. |
| 10 | NC | unconnected | No connect. |
| 11 | VS | power_in | High-side floating supply return; operates up to 600V in bootstrap operation. |
| 12 | HO | output | High-side gate drive output, 1.4A source / 1.8A sink capability. |
| 13 | VB | power_in | High-side floating supply, VS+10V to VS+20V recommended, absolute maximum +624V. |
| 14 | NC | unconnected | No connect. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TFSS |
| Package | PDIP-14 |
| Category | Motor Driver ICs |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VB High side floating supply voltage (absolute maximum) | VB | -0.3 |  | 624 | V |  | 3 |
| VCC Logic and low side fixed supply voltage (absolute maximum) | VCC | -0.3 |  | 24 | V |  | 3 |
| Offset supply voltage transient (absolute maximum) | dVS/dt |  |  | 50 | V/ns |  | 3 |
| VS High side floating supply offset voltage | VS |  |  | 600 | V | Logic operational for VS of -5V to 600V (NOTE3) | 3 |
| VCC Logic and low side fixed supply voltage | VCC | 10 |  | 20 | V |  | 3 |
| VLO Low side output voltage | VLO | 0 |  |  | V |  | 3 |
| VIN Logic input voltage (IN & SD*) | VIN |  |  | 5 | V |  | 3 |
| VSS Logic ground | VSS | -5 |  | 5 | V |  | 3 |
| TA Ambient temperature | TA | -40 |  | 125 | °C |  | 3 |
| TJ Junction operating temperature | TJ |  |  | 150 | °C |  | 3 |
| TL Lead temperature (soldering) | TL |  |  | 300 | °C | Soldering, 10s | 3 |
| Tstg Storage temperature range | Tstg | -55 |  | 150 | °C |  | 3 |
| Logic 1 input voltage for HO & logic 0 for LO | VIH | 2.5 |  |  | V | VCC = 10 V to 20 V | 4 |
| Logic 0 input voltage for HO & logic 1 for LO | VIL |  |  | 0.8 | V |  | 4 |
| SD* input positive going threshold | VSD, TH+ | 2.5 |  |  | V |  | 4 |
| SD* input negative going threshold | VSD, TH- |  |  | 0.8 | V |  | 4 |
| High level output voltage, VBIAS - VO | VOH |  |  | 1.4 | V | IO = 0A | 4 |
| Low level output voltage, VO | VOL |  |  | 0.2 | V | IO = 20mA | 4 |
| Offset supply leakage current | ILK |  |  | 50 | mA | VB = VS = 600V | 4 |
| Quiescent VBS supply current | IBSO | 20 | 60 | 150 |  | VIN = 0V or 5V | 4 |
| Quiescent VCC supply current | ICCQ | 0.4 | 1 | 1.8 | mA | VIN = 0V or 5V | 4 |
| Logic 1 input bias current | IIN+ |  | 25 | 60 |  | IN = 5V, SD* = 0V | 4 |
| Logic 0 input bias current | IIN- |  |  | 1 |  | IN = 0V, SD* = 5V | 4 |
| VBS supply under-voltage positive going threshold | VBSUV+ | 8 | 8.9 | 9.8 | V |  | 4 |
| VBS supply under-voltage negative going threshold | VBSUV- | 7.4 | 8.2 | 9 | V |  | 4 |
| VCC supply under-voltage positive going threshold | VCCUV+ | 8 | 8.9 | 9.8 | V |  | 4 |
| VCC supply under-voltage negative going threshold | VCCUV- | 7.4 | 8.2 | 9 | V |  | 4 |
| Output high short circuit pulsed current | IO+ | 1.4 | 1.9 |  | A | VO = 0V, PW ≤ 10 ms | 4 |
| Output low short circuit pulsed current | IO- | 1.7 | 2.3 |  | A | VO = 15V, PW ≤ 10 ms | 4 |
| Turn-on propagation delay | tON |  | 680 | 900 | ns | VS = 0V | 5 |
| Turn-off propagation delay | tOFF |  | 270 | 400 | ns | VS = 0 V or 600V | 5 |
| Shut-down propagation delay | tSD |  | 180 | 270 | ns |  | 5 |
| ON delay matching, HS & LS turn-on | tDM ON |  |  | 90 | ns |  | 5 |
| OFF delay matching, HS & LS turn-off | tDM OFF |  |  | 40 | ns |  | 5 |
| Turn-on rise time | tr |  | 40 | 60 | ns | VS = 0V | 5 |
| Turn-off fall time | tf |  | 20 | 35 | ns |  | 5 |
| Deadtime tDT LO-HO & tDT HO-LO | tDT | 280 | 400 | 520 | ns | RDT = 0W | 5 |
| Deadtime tDT LO-HO & tDT HO-LO | tDT | 4 | 5 | 6 | ms | RDT= 200kW | 5 |
| Deadtime matching tMDT = tDT LO-HO - tDT HO-LO | tMDT |  | 0 | 50 | ns | RDT = 0W | 5 |
| Deadtime matching tMDT = tDT LO-HO - tDT HO-LO | tMDT |  | 0 | 600 | ns | RDT= 200kW | 5 |

## CAD (KiCad official)

- Symbol: `TF21844-3BS`
- Footprint: `Package_DIP:DIP-14_W7.62mm`
- 3D model: PDIP-14 (KiCad packages3D, STEP)
- 3D model files: `tf21844-3bs-etched.step` / `tf21844-3bs-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tf21844-3bs.step` / `tf21844-3bs.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TFSS datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603184240771014656) (9 pp, sha256 `e7b821c4d1eff14e`, retrieved 2026-10-16, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tf21844-3bs-datasheet.pdf)