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TF2183M-TAH

Public Made by Adom

by adom

TFSS Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TF2183M-TAH

TFSS · Gate Drivers · SOIC-8

TF2183M-TAH from TFSS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HIN input Logic input for the high-side gate driver, in phase with HO; recommended input range is 0 V to 5 V with a Schmitt trigger, internal pull-down, and 3.3 V logic compatibility.
2 LIN* input Logic input for the low-side gate driver, out of phase with LO; recommended input range is 0 V to 5 V with a Schmitt trigger, internal pull-down, and 3.3 V logic compatibility.
3 COM power_in Low-side and logic return for the device; logic ground VSS is referenced to COM within -5 V to +5 V.
4 LO output Low-side gate drive output, swinging between 0 V and VCC, with 1.9 A source and 2.3 A sink pulsed output current capability.
5 VCC power_in Low-side and logic fixed supply; recommended 10 V to 20 V, absolute maximum -0.3 V to +24 V.
6 VS power_in High-side floating supply return; logic operates for VS from -5 V to +600 V, with offset supply transient dVS/dt rated to 50 V/ns.
7 HO output High-side gate drive output, swinging between VS and VB.
8 VB power_in High-side floating supply; recommended VS + 10 V to VS + 20 V, absolute maximum -0.3 V to +624 V.

Key specifications

Parameter Value
Manufacturer TFSS
Package SOIC-8
Category Motor Driver ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VB - High side floating supply voltage (absolute maximum) VB -0.3 624 V 4
dVS/dt - Offset supply voltage transient (absolute maximum) dVS / dt 50 V/ns 4
VCC - Low-side fixed supply voltage (absolute maximum) VCC -0.3 24 V 4
TJ - Junction operating temperature (absolute maximum) TJ 150 °C 4
TL - Lead temperature (absolute maximum) TL 300 °C soldering, 10 seconds 4
Tstg - Storage temperature (absolute maximum) Tstg -55 150 °C 4
VS - High side floating supply offset voltage (recommended) VS 600 V NOTE3: Logic operational for VS of -5V to +600V 4
VCC - Low side fixed supply voltage (recommended) VCC 10 20 V 4
VLO - Low side output voltage (recommended) VLO 0 V 4
VIN - Logic input voltage HIN and LIN* (recommended) VIN 0 5 V 4
TA - Ambient temperature (recommended) TA -40 125 °C 4
Logic 1 input voltage (HIN) and logic 0 (LIN*) VIH 2.5 V VCC = 10V to 20V 5
Logic 0 input voltage (HIN) and logic 1 (LIN*) VIL 0.8 V 5
High level output voltage, VBIAS - VO VOH 1.2 V IO = 0A 5
Low level output voltage, VO VOL 0.1 V IO = 20mA 5
Offset supply leakage current ILK 50 mA VB = VS = 600V 5
Quiescent VBS supply current IBSQ 20 60 150 VIN = 0V or 5V 5
Quiescent VCC supply current ICCQ 0.4 1.6 2 mA VIN = 0V or 5V 5
Logic 1 input bias current (HIN) IIN+ 25 60 mA HIN = 5V, LIN* = 0V 5
Logic 0 input bias current (LIN*) IIN- 1 mA HIN = 0V, LIN* = 5V 5
VBS supply under-voltage positive going threshold VBSUV+ 8 8.9 9.8 V 5
VBS supply under-voltage negative going threshold VBSUV- 7.4 8.2 9 V 5
VCC supply under-voltage positive going threshold VCCUV+ 8 8.9 9.8 V 5
VCC supply under-voltage negative going threshold VCCUV- 7.4 8.2 9 V 5
Output high short circuit pulsed current IO+ 1.4 1.9 A VO = 0V, PW ≤ 10 ms 5
Output low short circuit pulsed current IO- 1.7 2.3 A VO = 15V, PW ≤ 10 ms 5
Turn-on propagation delay ton 180 270 ns VS = 0V 6
Turn-off propagation delay toff 220 330 ns VS = 0V or 600V 6
Delay matching tDM 50 ns 6
Turn-on rise time tr 40 60 ns 6
Turn-off fall time tf 20 35 ns 6
Deadtime tDT LO-HO and tDT HO-LO tDT 280 400 520 ns RDT = 0W 6
Deadtime matching tDT LO-HO - tDT HO-LO tDTM 0 50 ns RDT = 0W 6

CAD (KiCad official)

  • Symbol: TF2183M-TAH
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tf2183m-tah-etched.step / tf2183m-tah-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tf2183m-tah.step / tf2183m-tah.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TFSS datasheet (9 pp, sha256 dff5c418a21ca0ad, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF