component
TF2181M-TAH
Public Made by Adomby adom
TFSS Gate Drive ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTF2181M-TAH
TFSS · Gate Drive ICs · SOIC-8
TF2181M-TAH from TFSS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HIN | input | Logic input for high-side gate driver output, in phase with HO; Schmitt triggered with internal pull down, 3.3V capable, logic 1 min 2.5V and logic 0 max 0.8V. |
| 2 | LIN | input | Logic input for low-side gate driver output, in phase with LO; Schmitt triggered with internal pull down, 3.3V capable, logic 1 min 2.5V and logic 0 max 0.8V. |
| 3 | COM | power_in | Low-side and logic return (ground). |
| 4 | LO | output | Low-side gate drive output, 1.9A source / 2.3A sink capability, swing 0V to VCC. |
| 5 | VCC | power_in | Low-side and logic fixed supply, recommended 10V to 20V (absolute max 24V) with undervoltage lockout. |
| 6 | VS | power_in | High-side floating supply return (offset voltage), up to 600V recommended operating and VB-24V to VB+0.3V absolute maximum. |
| 7 | HO | output | High-side gate drive output, 1.9A source / 2.3A sink capability, swing VS to VB. |
| 8 | VB | power_in | High-side floating supply, VS+10V to VS+20V recommended (absolute max 624V) with undervoltage lockout. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TFSS |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic 1 input voltage | VIH | 2.5 | V | VCC = 10V to 20V | 4 | ||
| Logic 0 input voltage | VIL | 0.8 | V | VCC = 10V to 20V | 4 | ||
| High level output voltage, VBIAS - VO | VOH | 1.4 | V | IO = 0A | 4 | ||
| Low level output voltage, VO | VOL | 0.2 | V | IO = 20mA | 4 | ||
| Offset supply leakage current | ILK | 50 | mA | VB = VS = 600V | 4 | ||
| Quiescent VBS supply current | IBSQ | 20 | 60 | 150 | mA | VIN = 0V or 5V | 4 |
| Quiescent VCC supply current | ICCQ | 50 | 120 | 240 | mA | VIN = 0V or 5V | 4 |
| Logic 1 input bias current | IIN+ | 25 | 60 | mA | VIN = 5V | 4 | |
| Logic 0 input bias current | IIN- | 5 | mA | VIN = 0V | 4 | ||
| VBS supply under-voltage positive going threshold | VBSUV+ | 8 | 8.9 | 9.8 | V | 4 | |
| VBS supply under-voltage negative going threshold | VBSUV- | 7.4 | 8.2 | 9 | V | 4 | |
| VCC supply under-voltage positive going threshold | VCCUV+ | 8 | 8.9 | 9.8 | V | 4 | |
| VCC supply under-voltage negative going threshold | VCCUV- | 7.4 | 8.2 | 9 | V | 4 | |
| Output high short circuit pulsed current | IO+ | 1.4 | 1.9 | A | VO = 0V, PW ≤ 10 ms | 4 | |
| Output low short circuit pulsed current | IO- | 1.7 | 2.3 | A | VO = 15V, PW ≤ 10 ms | 4 | |
| Turn-on propagation delay | ton | 180 | 270 | ns | VS = 0V | 5 | |
| Turn-off propagation delay | toff | 220 | 330 | ns | VS = 0V or 600V | 5 | |
| Delay matching, HS & LS turn-on/off | tDM | 35 | ns | 5 | |||
| Turn-on rise time | tr | 40 | 60 | ns | VS = 0V | 5 | |
| Turn-off fall time | tf | 20 | 35 | ns | VS = 0V | 5 | |
| High side floating supply offset voltage | VS | 600 | V | NOTE3 | 3 | ||
| Low side fixed supply voltage | VCC | 10 | 20 | V | 3 | ||
| Low side output voltage | VLO | 0 | V | max is VCC | 3 | ||
| Logic input voltage (HIN and LIN) | VIN | 0 | 5 | V | 3 | ||
| Ambient temperature | TA | -40 | 125 | °C | 3 | ||
| High side floating supply voltage | VB | -0.3 | 624 | V | 3 | ||
| Offset supply voltage transient | dVS/dt | 50 | V/ns | 3 | |||
| Low-side fixed supply voltage | VCC | -0.3 | 24 | V | 3 | ||
| Low-side output voltage | VLO | -0.3 | V | max is VCC +0.3V | 3 | ||
| Logic input voltage (HIN and LIN) | VIN | -0.3 | V | max is VCC +0.3V | 3 | ||
| Junction operating temperature | TJ | 150 | °C | 3 | |||
| Lead temperature | TL | 300 | °C | soldering, 10 seconds | 3 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 3 |
CAD (KiCad official)
- Symbol:
TF2181M-TAH - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tf2181m-tah-etched.step/tf2181m-tah-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tf2181m-tah.step/tf2181m-tah.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TFSS datasheet (9 pp, sha256
565b2d2143683c5f, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).