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TF2136M-TLH

Public Made by Adom

by adom

TFSS Gate Drivers, SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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TF2136M-TLH

TFSS · Gate Drivers · SOIC-28-300mil

TF2136M-TLH from TFSS, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Low-side and logic fixed supply, recommended operating range 10 V to 20 V (absolute maximum -0.3 V to +24 V).
2 HIN1* input Logic input for the high-side gate driver output HO1, out of phase with HO1; logic input voltage range VSS to 5 V.
3 HIN2* input Logic input for the high-side gate driver output HO2, out of phase with HO2; logic input voltage range VSS to 5 V.
4 HIN3* input Logic input for the high-side gate driver output HO3, out of phase with HO3; logic input voltage range VSS to 5 V.
5 LIN1* input Logic input for the low-side gate driver output LO1, out of phase with LO1; logic input voltage range VSS to 5 V.
6 LIN2* input Logic input for the low-side gate driver output LO2, out of phase with LO2; logic input voltage range VSS to 5 V.
7 LIN3* input Logic input for the low-side gate driver output LO3, out of phase with LO3; logic input voltage range VSS to 5 V.
8 FO* output Open-drain fault output asserted on over-current and VCC undervoltage lockout; fault output voltage range VSS to VCC.
9 ITRIP input Analog input for over-current shutdown, with an over-current detect positive threshold of 400 mV to 600 mV (typical 500 mV).
10 EN input Logic input that enables the I/O logic functions when high; driving it low shuts down the outputs with an enable-low-to-output shutdown delay of 225 ns to 425 ns (typical 330 ns).
11 RCIN input External RC network input that defines the fault clear delay; RCIN positive-going threshold is 7.0 V to 9.8 V (typical 8.4 V).
12 VSS power_in Logic ground; recommended range -5 V to 5 V as printed in the recommended operating conditions.
13 COM power_in Low-side driver return, the reference for the LO1, LO2 and LO3 outputs.
14 LO3 output Low-side gate driver output for phase 3, referenced to COM with output voltage range COM to VCC.
15 LO2 output Low-side gate driver output for phase 2, referenced to COM with output voltage range COM to VCC.
16 LO1 output Low-side gate driver output for phase 1, referenced to COM with output voltage range COM to VCC.
17 NC unconnected No connect.
18 VS3 power_in High-side floating supply return for channel 3; offset range VB-24 V to VB+0.3 V, with logic operational for VS of -5 V to +600 V.
19 HO3 output High-side floating gate driver output for channel 3, with output voltage range VS-0.3 V to VB+0.3 V.
20 VB3 power_in High-side floating supply for channel 3, recommended VS+10 V to VS+20 V (absolute maximum -0.3 V to +624 V).
21 NC unconnected No connect.
22 VS2 power_in High-side floating supply return for channel 2; offset range VB-24 V to VB+0.3 V, with logic operational for VS of -5 V to +600 V.
23 HO2 output High-side floating gate driver output for channel 2, with output voltage range VS-0.3 V to VB+0.3 V.
24 VB2 power_in High-side floating supply for channel 2, recommended VS+10 V to VS+20 V (absolute maximum -0.3 V to +624 V).
25 NC unconnected No connect.
26 VS1 power_in High-side floating supply return for channel 1; offset range VB-24 V to VB+0.3 V, with logic operational for VS of -5 V to +600 V.
27 HO1 output High-side floating gate driver output for channel 1, with output voltage range VS-0.3 V to VB+0.3 V.
28 VB1 power_in High-side floating supply for channel 1, recommended VS+10 V to VS+20 V (absolute maximum -0.3 V to +624 V).

Key specifications

Parameter Value
Manufacturer TFSS
Package SOIC-28-300mil
Category Motor Driver ICs
Pins 28

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
High side floating supply offset voltage VS 600 V Logic operational for VS of -5V to +600V (NOTE3) 5
Low side fixed supply voltage VCC 10 20 V 5
Logic input voltage (HIN*, LIN*, ITRIP, EN) VIN 5 V 5
Logic Ground VSS -5 5 C 5
Ambient temperature TA -40 125 °C 5
High-side floating supply voltage VB -0.3 624 V 5
Low-side fixed supply voltage VCC -0.3 24 V 5
Logic input voltage (HIN*, LIN*, ITRIP, EN and FO*) VIN -0.3 5.5 V 5
Low-side output voltage VLO -0.3 V Upper limit printed as VCC +0.3V 5
Junction operating temperature TJ 150 °C 5
Lead temperature (soldering) TL 300 °C 10 seconds 5
Storage temperature Tstg -55 150 °C 5
Logic 0 input voltage VIH 2.4 V VBIAS = 15V, TA = 25 °C 6
Logic 1 input voltage VIL 0.8 V VBIAS = 15V, TA = 25 °C 6
High level output voltage, VBIAS - VO VOH 0.1 V IO = 0mA 6
Low level output voltage, VO VOL 0.1 V IO = 0mA 6
Offset supply leakage current ILK 10 mA VB = VS = 600V 6
Quiescent VBS supply current IBSQ 10 85 130 mA VIN = 0V or 5V, EN=0V 6
Quiescent VCC supply current ICCQ 1.1 1.6 mA VIN = 0V or 5V, EN=0V 6
Logic input bias current (HO=LO=HIGH) IIN+ 130 200 mA VIN = 0V 6
Logic input bias current (HO=LO=LOW) IIN- 3 20 mA VIN = 5V 6
Logic Enable 1 input bias current IEN+ 33 80 mA VEN = 5V 6
Logic Enable 0 input bias current IEN- 2 mA VEN = 0V 6
VBS and VCC supply under-voltage positive going threshold VBSUV+ / VCCUV+ 7.6 8.9 9.9 V 6
VBS and VCC supply under-voltage negative going threshold VBSUV- / VCCUV- 7.1 8.3 9.4 V 6
Output high short circuit pulsed current IO+ 120 200 mA VO = 0V, PW ≤ 10 ms 6
Output low short circuit pulsed current IO- 250 350 mA VO = 15V, PW ≤ 10 ms 6
Overcurrent detect positive threshold VITH+ 400 500 600 mV 6
Overcurrent detect negative threshold VITH- 340 420 500 mV 6
Short-circuit input current ICSIN 6 11 16 mA VCSIN=1V 6
RCIN Positive going threshold voltage VRCINTH+ 7 8.4 9.8 V 6
RCIN Negative going threshold voltage VRCINTH- 5 V 6
Fault output low level voltage VFOL 0.2 0.5 V VCS=1V, IFO=1.5mA 6
RCIN On resistance RDSRCIN 40 75 110 W IRCIN=1.5mA 6
Fault output on resistance RDSFO 80 130 180 W IFO=1.5mA 6
Turn-on propagation delay ton 200 330 460 ns VS = 0V 7
Turn-off propagation delay toff 200 330 460 ns VS = 0V 7
Turn-on rise time tr 90 150 ns VS = 0V 7
Turn-off fall time tf 35 60 ns 7
Delay matching tDM 50 ns 7
Enable low to output shutdown delay tEN 225 330 425 ns 7
ITRIP Pin leading-edge blanking time tBLT 200 300 400 ns 7
Time from ITRIP triggering to FO* tFLT 360 550 760 ns From VITRIP= 1V to FO* turn off 7
Time from ITRIP triggering to all gate outputs turn off tITRIP 420 615 820 ns From VITRIP= 1V to starting gate turn off 7
Input filtering time (HIN*, LIN*, EN) tFLTIN 250 ns 7
Deadtime tDT 200 290 420 ns 7
Deadtime matching tDTM 50 ns 7
Output pulse width matching tPM 50 75 ns PWIN >1ms 7
Fault clear time tFLTCLR 1.6 ms CRCIN = 1nF, RRCIN = 2MW 7

CAD (KiCad official)

  • Symbol: TF2136M-TLH
  • Footprint: Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm
  • 3D model: SOIC-28-300mil (KiCad packages3D, STEP)
  • 3D model files: tf2136m-tlh-etched.step / tf2136m-tlh-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tf2136m-tlh.step / tf2136m-tlh.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TFSS datasheet (10 pp, sha256 393de55e5d8c9ce4, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF