component
TF2117-TAU
Public Made by Adomby adom
TFSS Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
TF2117-TAU
TFSS · Gate Drivers · SOIC-8
TF2117-TAU from TFSS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Logic and gate drive supply, recommended 10V to 20V (absolute maximum -0.3V to +24V). |
| 2 | IN | input | Logic input for gate driver output HO, in phase with HO, with Schmitt trigger and internal pull down, 0V to VCC. |
| 3 | COM | power_in | Logic ground. |
| 4 | NC | unconnected | No connect. |
| 5 | NC | unconnected | No connect. |
| 6 | VS | power_in | High-side floating supply return, offset voltage operational up to 600V. |
| 7 | HO | output | High-side gate drive output swinging from VS to VB, drives one N-channel MOSFET or IGBT. |
| 8 | VB | power_in | High-side floating supply, VS+10V to VS+20V recommended (absolute maximum -0.3V to +624V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TFSS |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic supply voltage (recommended) | VCC | 10 | 20 | V | Low side and logic fixed supply voltage | 4 | |
| High side floating supply offset voltage (recommended) | VS | 600 | V | NOTE3: logic operational for VS of -5V to +600V | 4 | ||
| Logic input voltage (recommended) | VIN | 0 | V | IN/IN*; upper limit printed as VCC | 4 | ||
| Ambient temperature | TA | -40 | 125 | °C | 4 | ||
| Logic 1 input voltage | VIH | 9.5 | V | VBIAS=15V, TA=25°C, NOTE 5 | 5 | ||
| Logic 0 input voltage | VIL | 6 | V | VBIAS=15V, TA=25°C, NOTE 5 | 5 | ||
| High level output voltage, VBIAS - VO | VOH | 0.05 | 0.2 | V | IO = 2mA | 5 | |
| Low level output voltage | VOL | 0.02 | 0.1 | V | IO = 2mA | 5 | |
| Offset supply leakage current | ILK | 50 | mA | VB = VS = 600V | 5 | ||
| Quiescent VBS supply current | IBSQ | 50 | 240 | mA | VIN = 0V or VCC | 5 | |
| Quiescent VCC supply current | ICCQ | 70 | 340 | mA | VIN = 0V or VCC | 5 | |
| Logic 1 input bias current | IIN+ | 20 | 40 | mA | VIN = VCC | 5 | |
| Logic 0 input bias current | IIN- | 5 | mA | VIN = 0V | 5 | ||
| VBS supply under-voltage positive going threshold | VBSUV+ | 7.6 | 8.6 | 9.6 | V | 5 | |
| VBS supply under-voltage negative going threshold | VBSUV- | 7.2 | 8.2 | 9.2 | V | 5 | |
| VCC supply under-voltage positive going threshold | VCCUV+ | 7.6 | 8.6 | 9.6 | V | 5 | |
| VCC supply under-voltage negative going threshold | VCCUV- | 7.2 | 8.2 | 9.2 | V | 5 | |
| Output high short circuit pulsed current | IO+ | 200 | 290 | mA | VO = 0V, VIN = Logic "1", PW ≤ 10 ms | 5 | |
| Output low short circuit pulsed current | IO- | 420 | 600 | mA | VO = 15V, VIN = Logic "0", PW ≤ 10 ms | 5 | |
| Turn-on propagation delay | tON | 125 | 200 | ns | VS = 0V; VBIAS=15V, CL=1000pF, TA=25°C | 6 | |
| Turn-off propagation delay | tOFF | 105 | 180 | ns | VS = 600V; VBIAS=15V, CL=1000pF, TA=25°C | 6 | |
| Turn-on rise time | tr | 75 | 130 | ns | VBIAS=15V, CL=1000pF, TA=25°C | 6 | |
| Turn-off fall time | tf | 35 | 65 | ns | VBIAS=15V, CL=1000pF, TA=25°C | 6 | |
| High side floating supply voltage | VB | -0.3 | 624 | V | 4 | ||
| Logic supply voltage | VCC | -0.3 | 24 | V | 4 | ||
| Logic input voltage | VIN | -0.3 | V | upper limit printed as VCC +0.3V | 4 | ||
| Allowable offset supply voltage transient | dVS/dt | 50 | V/ns | 4 | |||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | TS | -55 | 150 | °C | 4 | ||
| Thermal resistance junction to ambient SOIC-8 | RqJA | 200 | °C/W | Absolute Maximum Ratings section; JEDEC 2-layer FR-4 board | 4 |
CAD (KiCad official)
- Symbol:
TF2117-TAU - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tf2117-tau-etched.step/tf2117-tau-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tf2117-tau.step/tf2117-tau.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TFSS datasheet (10 pp, sha256
5c186189b6b315a0, retrieved 2026-10-24, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TF2117-TAU
**TFSS** · Gate Drivers · SOIC-8
TF2117-TAU from TFSS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Logic and gate drive supply, recommended 10V to 20V (absolute maximum -0.3V to +24V). |
| 2 | IN | input | Logic input for gate driver output HO, in phase with HO, with Schmitt trigger and internal pull down, 0V to VCC. |
| 3 | COM | power_in | Logic ground. |
| 4 | NC | unconnected | No connect. |
| 5 | NC | unconnected | No connect. |
| 6 | VS | power_in | High-side floating supply return, offset voltage operational up to 600V. |
| 7 | HO | output | High-side gate drive output swinging from VS to VB, drives one N-channel MOSFET or IGBT. |
| 8 | VB | power_in | High-side floating supply, VS+10V to VS+20V recommended (absolute maximum -0.3V to +624V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TFSS |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic supply voltage (recommended) | VCC | 10 | | 20 | V | Low side and logic fixed supply voltage | 4 |
| High side floating supply offset voltage (recommended) | VS | | | 600 | V | NOTE3: logic operational for VS of -5V to +600V | 4 |
| Logic input voltage (recommended) | VIN | 0 | | | V | IN/IN*; upper limit printed as VCC | 4 |
| Ambient temperature | TA | -40 | | 125 | °C | | 4 |
| Logic 1 input voltage | VIH | 9.5 | | | V | VBIAS=15V, TA=25°C, NOTE 5 | 5 |
| Logic 0 input voltage | VIL | | | 6 | V | VBIAS=15V, TA=25°C, NOTE 5 | 5 |
| High level output voltage, VBIAS - VO | VOH | | 0.05 | 0.2 | V | IO = 2mA | 5 |
| Low level output voltage | VOL | | 0.02 | 0.1 | V | IO = 2mA | 5 |
| Offset supply leakage current | ILK | | | 50 | mA | VB = VS = 600V | 5 |
| Quiescent VBS supply current | IBSQ | | 50 | 240 | mA | VIN = 0V or VCC | 5 |
| Quiescent VCC supply current | ICCQ | | 70 | 340 | mA | VIN = 0V or VCC | 5 |
| Logic 1 input bias current | IIN+ | | 20 | 40 | mA | VIN = VCC | 5 |
| Logic 0 input bias current | IIN- | | | 5 | mA | VIN = 0V | 5 |
| VBS supply under-voltage positive going threshold | VBSUV+ | 7.6 | 8.6 | 9.6 | V | | 5 |
| VBS supply under-voltage negative going threshold | VBSUV- | 7.2 | 8.2 | 9.2 | V | | 5 |
| VCC supply under-voltage positive going threshold | VCCUV+ | 7.6 | 8.6 | 9.6 | V | | 5 |
| VCC supply under-voltage negative going threshold | VCCUV- | 7.2 | 8.2 | 9.2 | V | | 5 |
| Output high short circuit pulsed current | IO+ | 200 | 290 | | mA | VO = 0V, VIN = Logic "1", PW ≤ 10 ms | 5 |
| Output low short circuit pulsed current | IO- | 420 | 600 | | mA | VO = 15V, VIN = Logic "0", PW ≤ 10 ms | 5 |
| Turn-on propagation delay | tON | | 125 | 200 | ns | VS = 0V; VBIAS=15V, CL=1000pF, TA=25°C | 6 |
| Turn-off propagation delay | tOFF | | 105 | 180 | ns | VS = 600V; VBIAS=15V, CL=1000pF, TA=25°C | 6 |
| Turn-on rise time | tr | | 75 | 130 | ns | VBIAS=15V, CL=1000pF, TA=25°C | 6 |
| Turn-off fall time | tf | | 35 | 65 | ns | VBIAS=15V, CL=1000pF, TA=25°C | 6 |
| High side floating supply voltage | VB | -0.3 | | 624 | V | | 4 |
| Logic supply voltage | VCC | -0.3 | | 24 | V | | 4 |
| Logic input voltage | VIN | -0.3 | | | V | upper limit printed as VCC +0.3V | 4 |
| Allowable offset supply voltage transient | dVS/dt | | | 50 | V/ns | | 4 |
| Junction temperature | TJ | | | 150 | °C | | 4 |
| Storage temperature | TS | -55 | | 150 | °C | | 4 |
| Thermal resistance junction to ambient SOIC-8 | RqJA | | | 200 | °C/W | Absolute Maximum Ratings section; JEDEC 2-layer FR-4 board | 4 |
## CAD (KiCad official)
- Symbol: `TF2117-TAU`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tf2117-tau-etched.step` / `tf2117-tau-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tf2117-tau.step` / `tf2117-tau.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [TFSS datasheet](docs/tf2117-tau-datasheet.pdf) (10 pp, sha256 `5c186189b6b315a0`, retrieved 2026-10-24, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tf2117-tau-datasheet.pdf)