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TF2113-3BS
Public Made by Adomby adom
TFSS Gate Drive ICs, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTF2113-3BS
TFSS · Gate Drive ICs · PDIP-14
TF2113-3BS from TFSS, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LO | output | Low-side gate driver output pin, in phase with LIN and swinging between COM and VCC. |
| 2 | COM | power_in | Low-side gate driver power supply return pin. |
| 3 | VCC | power_in | Low-side gate driver power supply pin, recommended 10V to 20V. |
| 4 | NC | unconnected | No connect pin. |
| 5 | VS | power_in | High-side gate driver floating power supply return pin, with offset up to 500V (TF2110) or 600V (TF2113). |
| 6 | VB | power_in | High-side gate driver floating power supply pin, operating at VS+10V to VS+20V. |
| 7 | HO | output | High-side gate driver output pin, in phase with HIN and swinging between VS and VB. |
| 8 | NC | unconnected | No connect pin. |
| 9 | VDD | power_in | Logic power supply pin, VSS+3V to VSS+20V recommended. |
| 10 | HIN | input | Logic input pin for the high-side gate driver output; HIN and HO are in phase. |
| 11 | SD | input | Logic input shutdown pin. |
| 12 | LIN | input | Logic input pin for the low-side gate driver output; LIN and LO are in phase. |
| 13 | VSS | power_in | Logic ground pin, with offset range of -5V to 5V relative to COM. |
| 14 | NC | unconnected | No connect pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TFSS |
| Package | PDIP-14 |
| Category | Power Management ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic 1 input voltage | VIH | 9.5 | V | VBIAS=15V, TA=25°C | 4 | ||
| Logic 0 input voltage | VIL | 6 | V | VBIAS=15V, TA=25°C | 4 | ||
| High level output voltage, VBIAS - VO | VOH | 1.4 | V | IO = 0A | 4 | ||
| Low level output voltage, VO | VOL | 0.15 | V | IO = 20mA | 4 | ||
| Offset supply leakage current | ILK | 50 | mA | VB = VS = 500V/600V | 4 | ||
| Quiescent VBS supply current | IBSQ | 55 | 230 | mA | VIN = 0V or VDD | 4 | |
| Quiescent VCC supply current | ICCQ | 56 | 340 | mA | VIN = 0V or VDD | 4 | |
| Quiescent VDD supply current | IDDQ | 0.6 | 30 | mA | VIN = 0V or VDD | 4 | |
| Logic 1 input bias current | IIN+ | 20 | 40 | mA | VIN = VDD | 4 | |
| Logic 0 input bias current | IIN- | 5 | mA | VIN = 0V | 4 | ||
| VBS supply under-voltage positive going threshold | VBSUV+ | 7.5 | 8.6 | 9.7 | V | 4 | |
| VBS supply under-voltage negative going threshold | VBSUV- | 7 | 8.2 | 9.4 | V | 4 | |
| VCC supply under-voltage positive going threshold | VCCUV+ | 7.4 | 8.5 | 9.6 | V | 4 | |
| VCC supply under-voltage negative going threshold | VCCUV- | 7 | 8.2 | 9.4 | V | 4 | |
| Output high short circuit pulsed current | IO+ | 2 | 2.5 | A | VO = 0V, VIN = VDD, PW ≤ 10 ms | 4 | |
| Output low short circuit pulsed current | IO- | 2 | 2.5 | A | VO = 15V, VIN = 0V, PW ≤ 10 ms | 4 | |
| Turn-on propagation delay | tON | 105 | 150 | ns | VS = 0V | 5 | |
| Turn-off propagation delay | tOFF | 94 | 125 | ns | VS = 500V/600V | 5 | |
| Shut down propagation delay | tSD | 70 | 140 | ns | VS = 500V/600V | 5 | |
| Turn-on rise time | tr | 15 | 35 | ns | CL=1000pF | 5 | |
| Turn-off fall time | tf | 13 | 25 | ns | CL=1000pF | 5 | |
| Delay Matching (TF2113) | tDM | 20 | ns | TF2113 | 5 | ||
| VB High side floating supply voltage (TF2113) | VB | -0.3 | 624 | V | 3 | ||
| Offset supply voltage transient | dVS/dt | 50 | V/ns | 3 | |||
| Low side fixed supply voltage | VCC | -0.3 | 24 | V | 3 | ||
| Logic supply voltage | VDD | -0.3 | 24 | V | -0.3V to VSS+24V | 3 | |
| Junction temperature | TJ | 150 | °C | 3 | |||
| Storage temperature | TSTG | -55 | 150 | °C | 3 | ||
| High side floating supply offset voltage (TF2113) | VS | 600 | V | NOTE3 | 3 | ||
| Low side fixed supply voltage | VCC | 10 | 20 | V | 3 | ||
| Logic supply offset voltage | VSS | -5 | 5 | V | When VDD<5V, min VSS offset limited to -VDD | 3 | |
| Ambient temperature | TA | -40 | 125 | °C | 3 | ||
| High side floating supply absolute voltage | VB | 10 | 20 | V | VS + 10 to VS + 20 | 3 | |
| Logic supply voltage | VDD | 3 | 20 | V | VSS + 3 to VSS + 20 | 3 |
CAD (KiCad official)
- Symbol:
TF2113-3BS - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: PDIP-14 (KiCad packages3D, STEP)
- 3D model files:
tf2113-3bs-etched.step/tf2113-3bs-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tf2113-3bs.step/tf2113-3bs.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TFSS datasheet (14 pp, sha256
76fe60a2309b0c44, retrieved 2026-10-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).