# TF2106M-TAH

**TFSS** · Gate Drivers · SOIC-8

TF2106M-TAH from TFSS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low-side and logic fixed supply, recommended 10V to 20V (absolute max 24V). |
| 2 | HIN | input | Logic input for high-side gate driver output (HO), in phase, CMOS/TTL compatible down to 3.3V with Schmitt trigger and internal pull-down. |
| 3 | LIN | input | Logic input for low-side gate driver output (LO), in phase, CMOS/TTL compatible down to 3.3V with Schmitt trigger and internal pull-down. |
| 4 | COM | power_in | Low-side return (ground) shared by the low-side driver and logic. |
| 5 | LO | output | Low-side gate drive output, swings 0V to VCC. |
| 6 | VS | power_in | High-side floating supply return, logic operational for VS of -5V to +600V. |
| 7 | HO | output | High-side gate drive output, swings VS to VB. |
| 8 | VB | power_in | High-side floating supply, VS+10V to VS+20V recommended (absolute max 624V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TFSS |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic "1" input voltage | VIH | 2.5 |  |  | V | VCC = 10V to 20V; VBIAS = 15V, TA = 25 °C | 4 |
| Logic "0" input voltage | VIL |  |  | 0.6 | V | VBIAS = 15V, TA = 25 °C | 4 |
| Offset supply leakage current | ILK |  |  | 50 | mA | VB = VS = 600V; VBIAS = 15V, TA = 25 °C | 4 |
| Quiescent VBS supply current | IBSQ | 20 | 75 | 130 | mA | VIN = 0V or 5V; VBIAS = 15V, TA = 25 °C | 4 |
| Quiescent VCC supply current | ICCQ | 60 | 120 | 180 | mA | VIN = 0V or 5V; VBIAS = 15V, TA = 25 °C | 4 |
| Logic "1" input bias current | IIN+ |  | 5 | 20 | mA | VIN = 5V; VBIAS = 15V, TA = 25 °C | 4 |
| Logic "0" input bias current | IIN- |  |  | 2 | mA | VIN = 0V; VBIAS = 15V, TA = 25 °C | 4 |
| VCC supply under-voltage positive going threshold | VCCUV+ | 8 | 8.9 | 9.8 | V | VBIAS = 15V, TA = 25 °C | 4 |
| VCC supply under-voltage negative going threshold | VCCUV- | 7.4 | 8.2 | 9 | V | VBIAS = 15V, TA = 25 °C | 4 |
| VBS supply under-voltage positive going threshold | VBSUV+ | 8 | 8.9 | 9.8 | V | VBIAS = 15V, TA = 25 °C | 4 |
| VCC supply under-voltage negative going threshold (VBS row, as printed) | VBSUV- | 7.4 | 8.2 | 9 | V | VBIAS = 15V, TA = 25 °C | 4 |
| Undervoltage lockout hysteresis | VUVLOH | 0.3 |  | 0.7 | V | VBIAS = 15V, TA = 25 °C | 4 |
| Output high short circuit pulsed current | IO+ | 130 | 290 |  | mA | VO = 0V, VIN = Logic “1”, PW ≤ 10 ms; VBIAS = 15V, TA = 25 °C | 4 |
| Output low short circuit pulsed current | IO- | 270 | 600 |  | mA | VO = 15V, VIN = Logic “0”, PW ≤ 10 ms; VBIAS = 15V, TA = 25 °C | 4 |
| Turn-on propagation delay | tON |  | 220 | 300 | ns | VS = 0V; VBIAS = 15V, TA = 25 °C, CL = 1000pF | 4 |
| Turn-off propagation delay | tOFF |  | 200 | 280 | ns | VS = 0V or 600V; VBIAS = 15V, TA = 25 °C, CL = 1000pF | 4 |
| Turn-on rise time | tr |  | 100 | 220 | ns | VBIAS = 15V, TA = 25 °C, CL = 1000pF | 4 |
| Turn-off fall time | tf |  | 35 | 80 | ns | VS = 0V; VBIAS = 15V, TA = 25 °C, CL = 1000pF | 4 |
| Delay matching | tDM |  |  | 30 | ns | VBIAS = 15V, TA = 25 °C, CL = 1000pF | 4 |
| VB - High side floating supply voltage | VB | -0.3 |  | 624 | V |  | 3 |
| Offset supply voltage transient | dVS/dt |  |  | 50 | V/ns |  | 3 |
| VCC - Low side and logic fixed supply voltage | VCC | -0.3 |  | 24 | V |  | 3 |
| VLO - Low side output voltage | VLO | -0.3 |  |  | V | Maximum printed as VCC+0.3V | 3 |
| VIN - Logic input voltage (HIN and LIN) | VIN | -0.3 |  |  | V | Maximum printed as VCC+0.3V | 3 |
| TJ - Junction operating temperature | TJ |  |  | 150 | °C |  | 3 |
| TL - Lead temperature (soldering) | TL |  |  | 300 | °C | Soldering, 10 s | 3 |
| Tstg - Storage temperature range | Tstg | -55 |  | 150 | °C |  | 3 |
| VS - High side floating supply offset voltage | VS | -5 |  | 600 | V | Logic operational for VS = -5 to +600V (NOTE3) | 3 |
| VCC - Low side and logic fixed supply voltage | VCC | 10 |  | 20 | V |  | 3 |
| VLO - Low side output voltage | VLO | 0 |  |  | V | Maximum printed as VCC | 3 |
| VIN - Logic input voltage (HIN and LIN) | VIN | 0 |  | 5 | V |  | 3 |
| TA - Ambient temperature | TA | -40 |  | 125 | °C |  | 3 |
| SOIC-8 thermal resistance, junction-to-ambient | qJA |  | 200 |  | °C/W | Mounted on standard JEDEC 2-layer FR-4 board | 3 |

## CAD (KiCad official)

- Symbol: `TF2106M-TAH`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tf2106m-tah-etched.step` / `tf2106m-tah-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tf2106m-tah.step` / `tf2106m-tah.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TFSS datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588920004574392320) (16 pp, sha256 `efec6aad1a072ff4`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tf2106m-tah-datasheet.pdf)