component

TESD24VS2BT RFG

Public Made by Adom

by adom

Taiwan Semiconductor ESD And Surge Protection (TVS/ESD), SOT-23. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

componentcircuit protectiontesd24vs2bt rfgfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 7d ago
viewers tesd24vs2bt-rfg: viewers · Ray 7d ago
package.json Publish 0.1.0 · Ray 7d ago
page.json Set visibility: public · Ray 7d ago
README.md Publish 0.1.0 · Ray 7d ago
tesd24vs2bt-rfg-etched.glb Publish 0.1.0 · Ray 7d ago
tesd24vs2bt-rfg-etched.step tesd24vs2bt-rfg: factory component page (tier=lcsc) · Ray 7d ago
tesd24vs2bt-rfg-hero.glb tesd24vs2bt-rfg: hero GLB from the etched model (keeps the MPN mark) · Ray 7d ago
tesd24vs2bt-rfg-hero.overlay.json Publish 0.1.0 · Ray 7d ago
tesd24vs2bt-rfg.glb Publish 0.1.0 · Ray 7d ago
tesd24vs2bt-rfg.kicad_mod Publish 0.1.0 · Ray 7d ago
tesd24vs2bt-rfg.kicad_sym Publish 0.1.0 · Ray 7d ago
tesd24vs2bt-rfg.lbr Publish 0.1.0 · Ray 7d ago
tesd24vs2bt-rfg.step Publish 0.1.0 · Ray 7d ago

TESD24VS2BT RFG

Taiwan Semiconductor · ESD And Surge Protection (TVS/ESD) · SOT-23

TESD24VS2BT RFG from Taiwan Semiconductor, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1 passive Protected line 1: TVS diode to common pin 3, VWM 24 V, V(BR) 25.4 V min at 5 mA, VC 70 V max at IPP = 3 A (8/20 µs), ±30 kV IEC 61000-4-2 air and contact.
2 2 passive Protected line 2: TVS diode to common pin 3, VWM 24 V, V(BR) 25.4 V min at 5 mA, VC 70 V max at IPP = 3 A (8/20 µs), ±30 kV IEC 61000-4-2 air and contact.
3 3 passive Common node of the two TVS diodes shown in the package schematic, joining pins 1 and 2 through the diode array.

Key specifications

Parameter Value
Manufacturer Taiwan Semiconductor
Package SOT-23
Category Circuit Protection
Pins 3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin ● Terminal: Matte tin plated leads, solderable per J-STD-002 ● Meet JESD 201 class 1A whisker test 1

CAD (KiCad official)

  • Symbol: TESD24VS2BT RFG
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: tesd24vs2bt-rfg-etched.step / tesd24vs2bt-rfg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tesd24vs2bt-rfg.step / tesd24vs2bt-rfg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Taiwan Semiconductor datasheet (5 pp, sha256 b74345d907cb2e2f, retrieved 2026-10-22, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF