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TEA2095TE

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NXP Semicon Monitors & Reset Circuits, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management icstea2095tefactory-2.0.0extractor-text

Verified TEA2095TE

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 9 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TEA2095TE · SOP-8-EP · 9 pins
  • ✓copper: 9 copper pads, none touching another net
  • •datasheet (warn): 1/9 pin names appear NOWHERE in the datasheet text: ['9:EP@p1']
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-jimdk6zg/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 9 pins = 9 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 9 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tea2095te.kicad_sym✓ tea2095te.kicad_mod✓ tea2095te.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8d ago
viewers tea2095te: viewers · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago
tea2095te-etched.glb Publish 0.1.0 · Ray 8d ago
tea2095te-etched.step tea2095te: factory component page (tier=mfr) · Ray 8d ago
tea2095te-hero.glb tea2095te: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
tea2095te-hero.overlay.json Publish 0.1.0 · Ray 8d ago
tea2095te.glb Publish 0.1.0 · Ray 8d ago
tea2095te.kicad_mod Publish 0.1.0 · Ray 8d ago
tea2095te.kicad_sym Publish 0.1.0 · Ray 8d ago
tea2095te.lbr Publish 0.1.0 · Ray 8d ago
tea2095te.step Publish 0.1.0 · Ray 8d ago
verification.json Verified: Published by the parts factory: tier mfr, 9 pins · Ray 8d ago

TEA2095TE

NXP Semicon · Monitors & Reset Circuits · SOP-8-EP

TEA2095TE from NXP Semicon, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GDB output Gate drive output for SR MOSFET B, limited to VG(max) (about 5 V when VCC is 5 V, up to 11 V typ at VCC 38 V) and actively pulled low in UVLO.
2 GND power_in Ground, the reference for all IC voltages.
3 DSB input Drain sense input for MOSFET B (synchronous timing control), withstanding up to 120 V DC (absolute max -0.8 V to +120 V).
4 SSB input Source sense input for MOSFET B, to be connected as close as possible to the MOSFET source, absolute max -0.4 V to +0.4 V.
5 SSA input Source sense input for MOSFET A, to be connected as close as possible to the MOSFET source, absolute max -0.4 V to +0.4 V.
6 DSA input Drain sense input for MOSFET A (synchronous timing control), withstanding up to 120 V DC (absolute max -0.8 V to +120 V).
7 VCC power_in IC supply input, operating range 4.75 V to 38 V, start threshold 4.55 V typ, needs a decoupling capacitor to GND close to the IC, and also the discharge function pin.
8 GDA output Gate drive output for SR MOSFET A, limited to VG(max) (about 5 V when VCC is 5 V, up to 11 V typ at VCC 38 V) and actively pulled low in UVLO.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer NXP Semicon
Package SOP-8-EP
Category Power Management ICs
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.4 38 V 10
Drain sense voltage A Vsense(D)A -0.8 120 V DC 10
Drain sense voltage B Vsense(D)B -0.8 120 V DC 10
Source sense voltage A Vsense(S)A -0.4 0.4 V DC 10
Source sense voltage B Vsense(S)B -0.4 0.4 V DC 10
GDA pin voltage VGDA -0.4 12 V DC 10
GDB pin voltage VGDB -0.4 12 V DC 10
Maximum frequency fmax 1 MHz if not limited by Ptot 10
Storage temperature Tstg -55 150 °C 10
Junction temperature Tj -40 150 °C 10
ESD voltage HBM VESD 2000 V Human Body Model 10
ESD voltage CDM VESD 500 V Charged Device Model 10
Supply voltage VCC 4.75 38 V 10
Junction temperature Tj -40 125 °C 10
Thermal resistance junction to ambient Rth(j-a) 46 K/W HSO8; 4-layer PCB; 4 vias; 0.4 mm; 35 µm Cu; 60 mm x 125 mm; exposed pad soldered 10
Thermal resistance junction to case Rth(j-c) 8 K/W HSO8 10
Start voltage Vstart 4.35 4.55 4.75 V 11
Stop voltage Vstop 4 4.2 4.4 V 11
Operating current ICC(oper) 80 90 110 µA energy-saving mode 11
Operating current ICC(oper) 0.7 0.9 1.05 mA normal operation (no gate charge) 11
Energy-saving mode activation time tact(es) 85 110 135 µs 11
Gate drive activation voltage Vact(drv) -450 -400 -350 mV Vsense(S)A/Vsense(S)B = 0 V 11
Gate drive regulation voltage Vreg(drv) -33 -25 -20 mV Vsense(S)A/Vsense(S)B = 0 V 11
Switch-off voltage Vswoff 60 150 200 mV Vsense(S)A/Vsense(S)B = 0 V 11
Gate pull-down resistance Rpd(G) 2 2.5 3 Ω VDS = 12 V; IG = 100 mA 11
Maximum gate voltage VG(max) 4.98 4.99 5 V VGDA/VGDB at VCC = 5 V 11
Maximum gate voltage VG(max) 10.4 10.6 10.8 V VGDA/VGDB at VCC = 12 V 11
Maximum gate voltage VG(max) 10.7 11 11.2 V VGDA/VGDB at VCC = 38 V 11
Discharge delay time td 1.1 1.4 1.7 s discharge delay time 12
Discharge current Idch 21 24 27 mA VVCC = 19.5 V 12
Discharge current Idch 28 34 41 mA VVCC = 12 V 12
Discharge current Idch 63 74 81 mA VVCC = 5 V 12

CAD (KiCad official)

  • Symbol: TEA2095TE
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: SOP-8-EP (KiCad packages3D, STEP)
  • 3D model files: tea2095te-etched.step / tea2095te-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tea2095te.step / tea2095te.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: NXP Semicon datasheet (19 pp, sha256 60e697e9e8499030, retrieved 2026-10-31, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF