main
Ray pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) a43ca33
{
 "schema": "adom.pads/1",
 "slug": "tea1995t",
 "footprint": "SOIC-8_3.9x4.9mm_P1.27mm",
 "generated_from": {
  "footprint": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.475,
   -1.905
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4"
 },
 "pad_count": 8,
 "symbol_pins": [
  "1",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8"
 ],
 "paste_apertures": 0,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "GDB",
   "type": "output",
   "description": "Gate drive output for external SR MOSFET B. Source/sink capable driver; output voltage limited to VG(max) (typically ~11 V from internal driver supply; limited to VCC when VCC = 5 V for logic-level MOSFETs). Actively pulled low during UVLO and start-up.",
   "is_pin1": true,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "GND",
   "type": "power_in",
   "description": "Device ground reference. The VCC decoupling capacitor must be connected between VCC and GND as close as possible to the IC to minimize inductance from high gate driver currents.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "DSB",
   "type": "input",
   "description": "Drain sense input for synchronous timing of MOSFET B. Handles input voltages up to 100 V. Positive drain sense voltages hold the gate driver off; negative voltages (differential vs SSB) enable SR conduction.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "SSB",
   "type": "input",
   "description": "Source sense (Kelvin) input for MOSFET B. Must be connected as close as possible to the source pin of the external SR MOSFET to minimize measurement errors from PCB trace parasitic inductance under high dI/dt.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "SSA",
   "type": "input",
   "description": "Source sense (Kelvin) input for MOSFET A. Must be connected as close as possible to the source pin of the external SR MOSFET to minimize measurement errors from PCB trace parasitic inductance under high dI/dt.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "DSA",
   "type": "input",
   "description": "Drain sense input for synchronous timing of MOSFET A. Handles input voltages up to 100 V. Positive drain sense voltages hold the gate driver off; negative voltages (differential vs SSA) enable SR conduction.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "VCC",
   "type": "power_in",
   "description": "Supply voltage input. Operates over 4.5 V to 38 V. UVLO releases above Vstart and re-engages below Vstop. Must be decoupled with a dedicated capacitor between VCC and GND placed close to the IC.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "GDA",
   "type": "output",
   "description": "Gate drive output for external SR MOSFET A. Source/sink capable driver; output voltage limited to VG(max) (typically ~11 V from internal driver supply; limited to VCC when VCC = 5 V for logic-level MOSFETs). Actively pulled low during UVLO and start-up.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}