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TEA19162T
Public Made by Adomby adom
NXP Semicon AC-DC Controllers & Regulators, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTEA19162T
NXP Semicon · AC-DC Controllers & Regulators · SO-8
TEA19162T from NXP Semicon, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GATEPFC | output | Gate driver output for the PFC MOSFET. |
| 2 | GND | power_in | Ground. |
| 3 | SNSCUR | input | Programmable current sense input for PFC. |
| 4 | SUPIC | power_in | Supply voltage; PFC enabled when it exceeds Vstart(SUPIC) of 13 V typical, and connected to the SUPIC pin of the TEA19161T. |
| 5 | SNSBOOST | input | Sense input for PFC output (boost) voltage, also used for OVP and open-loop protection and pulled down by the LLC to disable the PFC at start-up. |
| 6 | SNSMAINS | input | Sense input for mains voltage. |
| 7 | PFCCOMP | passive | Frequency compensation pin for PFC. |
| 8 | SNSAUX | input | Input from auxiliary winding for demagnetization timing and valley detection for PFC. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | NXP Semicon |
| Package | SO-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage on pin SUPIC | VSUPIC | -0.4 | 38 | V | 20 | ||
| Voltage on pin SNSMAINS | VSNSMAINS | -0.4 | 12 | V | current limited | 20 | |
| Voltage on pin PFCCOMP | VPFCCOMP | -0.4 | 12 | V | current limited | 20 | |
| Voltage on pin SNSAUX | VSNSAUX | -25 | 25 | V | current limited | 20 | |
| Voltage on pin SNSCUR | VSNSCUR | -0.4 | 12 | V | current limited | 20 | |
| Voltage on pin SNSBOOST | VSNSBOOST | -0.4 | 12 | V | current limited | 20 | |
| Voltage on pin GATEPFC | VGATEPFC | -0.4 | 12 | V | current limited | 20 | |
| Total power dissipation | Ptot | 0.45 | W | Tamb < 75 °C | 20 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 20 | ||
| Junction temperature | Tj | -40 | 150 | °C | 20 | ||
| Electrostatic discharge voltage, HBM | VESD | -2000 | 2000 | V | human body model | 20 | |
| Electrostatic discharge voltage, CDM | VESD | -500 | 500 | V | charged device model | 20 | |
| Thermal resistance junction to ambient | Rth(j-a) | 150 | K/W | in free air; JEDEC test board | 20 | ||
| Thermal resistance junction to case | Rth(j-c) | 90 | K/W | in free air; JEDEC test board | 20 | ||
| Start voltage on pin SUPIC | Vstart(SUPIC) | 12.35 | 13 | 13.65 | V | Tamb=25 °C; VSUPIC = 20 V | 21 |
| Undervoltage protection voltage on pin SUPIC | Vuvp(SUPIC) | 8.55 | 9 | 9.45 | V | 21 | |
| Supply current, operating mode | ICC | 0.8 | mA | operating mode; fsw = 100 kHz; pin GATEPFC = floating; VSNSBOOST = 2.2 V | 21 | ||
| Supply current, power-save mode | ICC | 0.2 | mA | power-save mode; pin PFCCOMP = floating; VSNSBOOST = 2.7 V | 21 | ||
| Source current on pin GATEPFC | Isource(GATEPFC) | -0.6 | A | VGATEPFC = 2 V; VSUPIC ≥ 13 V | 21 | ||
| Sink current on pin GATEPFC | Isink(GATEPFC) | 0.6 | A | VGATEPFC = 2 V; VSUPIC ≥ 13 V | 21 | ||
| Sink current on pin GATEPFC | Isink(GATEPFC) | 1.4 | A | VGATEPFC = 10 V; VSUPIC ≥ 13 V | 21 | ||
| Maximum output voltage on pin GATEPFC | Vo(max)GATEPFC | 10 | 11 | 12 | V | 21 | |
| Brownin current | Ibi | 5.35 | 5.75 | 6.15 | µA | 21 | |
| Brownout current | Ibo | 4.65 | 5 | 5.35 | µA | 21 | |
| Hysteresis of brownout current | Ibo(hys) | 640 | 750 | 820 | nA | Ibi − Ibo | 21 |
| Brownout detection delay time | td(det)bo | 45.2 | 50 | 55.5 | ms | 21 | |
| Regulated voltage on pin SNSMAINS | Vregd(SNSMAINS) | 230 | 250 | 270 | mV | mains detection period; no current at SNSMAINS; Cmax(SNSMAINS) = 100 pF | 21 |
| X-capacitor discharge delay time | td(dch) | 109 | 118 | 128 | ms | x-capacitor discharge | 21 |
| Charge current on pin GATEPFC | Ich(GATEPFC) | -29 | -26 | -23 | µA | x-capacitor discharge | 21 |
| Discharge current on pin GATEPFC | Idch(GATEPFC) | 23 | 26 | 29 | µA | x-capacitor discharge | 21 |
| Stop charge voltage on pin SNSCUR | Vch(stop)SNSCUR | 8 | 10.5 | 12.5 | mV | x-capacitor discharge; stop of external MOST gate charge; dV/dt = 0 | 21 |
| Stop discharge voltage on pin GATEPFC | Vdch(stop)GATEPFC | 0.3 | 0.7 | 1.1 | V | x-capacitor discharge; stop of external MOST gate discharge | 21 |
| Discharge off-time x-capacitor | toff(dch) | 1.88 | 6.4 | ms | time between discharge/charge pulses; GATEPFC pin | 21 | |
| Pulse period x-capacitor discharge | Tp | 3.76 | 4 | 4.27 | ms | pulse duration < 2 ms (typical); GATEPFC pin | 22 |
| Disable discharge voltage on pin GATEPFC | Vdis(dch)GATEPFC | 9 | 9.45 | 9.9 | V | x-capacitor discharge | 22 |
| Disable discharge voltage on pin SNSCUR | Vdis(dch)SNSCUR | 44 | 50 | 56 | mV | x-capacitor discharge | 22 |
| Regulation voltage on pin SNSBOOST | Vreg(SNSBOOST) | 2.475 | 2.5 | 2.525 | V | IPFCCOMP = 0 A | 22 |
| Transconductance error amplifier | gm | -90 | -75 | -60 | µA/V | VSNSBOOST to IPFCCOMP; /VSNSBOOST − Vintregd(SNSBOOST)/ < 40 mV | 22 |
| Sink current on pin PFCCOMP | Isink(PFCCOMP) | 30 | 35.5 | 41 | µA | VSNSBOOST = 2 V; VPFCCOMP = 2.75 V | 22 |
| High transconductance error amplifier | gm(high) | -1.26 | mA/V | VSNSBOOST to IPFCCOMP; Vstart(gm)high ≤ VSNSBOOST < Vstop(ovp) | 22 | ||
| Start high transconductance voltage | Vgm(high)start | 2.56 | 2.6 | 2.63 | V | pin SNSBOOST | 22 |
| Maximum clamp current | Iclamp(max) | -260 | -220 | -190 | µA | pin PFCCOMP; energy save mode; PFC off; VPFCCOMP = 0 V | 22 |
| PFC enable current | Ien(PFC) | -15 | -11.5 | -8 | µA | pin PFCCOMP | 22 |
| Clamp voltage on pin PFCCOMP (bidirectional) | Vclamp(PFCCOMP) | 3.4 | 3.5 | 3.6 | V | bidirectional clamp; energy save mode; PFC off | 22 |
| Clamp voltage on pin PFCCOMP (upper) | Vclamp(PFCCOMP) | 3.7 | 3.8 | 3.9 | V | upper clamp voltage; unidirectional clamp; operating mode; PFC on; IPFCCOMP = 120 µA | 22 |
CAD (KiCad official)
- Symbol:
TEA19162T - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
tea19162t-etched.step/tea19162t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tea19162t.step/tea19162t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: NXP Semicon datasheet (30 pp, sha256
9b7cfec5f28968c4, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).