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TEA18363T

Public Made by Adom

by adom

NXP Semicon AC-DC Controllers & Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management icstea18363tfactory-2.0.0extractor-text

Verified TEA18363T

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TEA18363T · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 27-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-jqpjdn3q/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tea18363t.kicad_sym✓ tea18363t.kicad_mod✓ tea18363t.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 7d ago
viewers tea18363t: viewers · Ray 7d ago
package.json Publish 0.1.0 · Ray 7d ago
page.json Set visibility: public · Ray 7d ago
README.md Publish 0.1.0 · Ray 7d ago
tea18363t-etched.glb Publish 0.1.0 · Ray 7d ago
tea18363t-etched.step tea18363t: factory component page (tier=mfr) · Ray 7d ago
tea18363t-hero.glb tea18363t: hero GLB from the etched model (keeps the MPN mark) · Ray 7d ago
tea18363t-hero.overlay.json Publish 0.1.0 · Ray 7d ago
tea18363t.glb Publish 0.1.0 · Ray 7d ago
tea18363t.kicad_mod Publish 0.1.0 · Ray 7d ago
tea18363t.kicad_sym Publish 0.1.0 · Ray 7d ago
tea18363t.lbr Publish 0.1.0 · Ray 7d ago
tea18363t.step Publish 0.1.0 · Ray 7d ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 7d ago

TEA18363T

NXP Semicon · AC-DC Controllers & Regulators · SOIC-8

TEA18363T from NXP Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Supply voltage pin, which the datasheet describes as having a large supply voltage range up to 30 V and which is regulated to Vstartup during start-up using the HV charge current.
2 GND power_in Ground reference pin for the controller.
3 DRIVER output Gate driver output that switches the external power MOSFET, with maximum on-time protection applied to it.
4 ISENSE input Current sense input that also carries the soft-start capacitor (CSS) for adjustable soft start.
5 AUX input Auxiliary winding input used for demagnetization timing, valley detection, overpower correction, and overvoltage protection.
6 CTRL input Control input through which the regulated output voltage is detected and which is used for burst mode operation.
7 n.c. unconnected Not connected.
8 HV power_in High-voltage start-up pin that charges the VCC capacitor from the mains and provides active X-capacitor discharge.

Key specifications

Parameter Value
Manufacturer NXP Semicon
Package SOIC-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
input/output voltage on pin HV VIO(HV) -0.4 700 V 17
supply voltage continuous VCC -0.4 30 V 17
supply voltage VCC 35 V t < 100 ms 17
input/output voltage on pin CTRL VIO(CTRL) -0.4 12 V 17
input voltage on pin ISENSE VI(ISENSE) -0.4 12 V 17
input/output voltage on pin AUX VIO(AUX) -5 5 V current limited 17
output voltage on pin DRIVER VO(DRIVER) -0.4 12 V 17
input/output current on pin AUX IIO(AUX) -1.5 1 mA 17
input/output current on pin HV IIO(HV) -1 5 mA 17
input/output current on pin CTRL IIO(CTRL) -3 0 mA 17
output current on pin DRIVER IO(DRIVER) -0.4 1 A < 10 % 17
total power dissipation Ptot 0.82 W Tamb < 75 °C 17
storage temperature Tstg -55 150 °C 17
junction temperature Tj -40 150 °C 17
electrostatic discharge voltage VESD -1000 1000 V class 1 human body model; pin HV 17
electrostatic discharge voltage VESD -2000 2000 V class 1 human body model; all other pins 17
electrostatic discharge voltage VESD -500 500 V charged device model 17
start-up current on pin HV Istartup(HV) 0.8 1.1 1.4 mA VHV > 10 V 18
clamp voltage Vclamp 680 V IHV < 2 mA 18
start-up voltage Vstartup 13.4 14.9 16.4 V 18
restart voltage burst mode Vrestart 9.9 11 12.1 V 18
undervoltage lockout threshold voltage Vth(UVLO) 9 9.9 10.8 V 18
reset voltage Vrst 7.75 8.65 9.55 V 18
operating supply current ICC(oper) 500 600 700 µA driver unloaded; excluding opto current 18
burst mode supply current ICC(burst) 200 235 270 µA non-switching; excluding opto current 18
protection supply current ICC(prot) 185 220 255 µA 18
discharge supply current ICC(dch) 0.9 1.25 1.6 mA latched protection; VCC > Vstartup 18
pulse duration on pin HV measuring mains voltage tp(HV) 18 20 22 µs measuring mains voltage 18
measurement frequency on pin HV fmeas(HV) 0.9 1 1.1 kHz measuring mains voltage 18
burst mode delay time on pin HV td(burst)HV 87 97 107 ms measuring mains voltage 18
brownout current on pin HV Ibo(HV) 552 587 622 µA 18
input/output voltage on pin CTRL minimum flyback peak current VIO(CTRL) 2.3 2.5 2.7 V minimum flyback peak current 19
input/output voltage on pin CTRL maximum flyback current VIO(CTRL) 4.9 5.25 5.6 V maximum flyback current 19
internal resistance on pin CTRL Rint(CTRL) 10 12 14 kΩ 19
input/output current on pin CTRL IIO(CTRL) 0.58 0.48 0.38 mA normal mode; VCTRL = 1.5 V 19
burst mode threshold voltage Vth(burst) 0.42 0.5 0.58 V 19
minimum switching frequency fsw(min) 23 25 27 kHz burst mode 19
regulated current on pin CTRL IREGD(CTRL) 115 100 85 µA burst mode 19
stop current on pin CTRL Istop(CTRL) 820 750 680 µA burst mode; system switching; including regulated output current 19
maximum switching frequency fsw(max) 125 132.5 140 kHz 20
frequency reduction start voltage Vstart(red)f 2.3 2.5 2.7 V pin CTRL 20
maximum sense voltage Vsense(max) 700 765 830 mV V/t = 0 V/s; IAUX = 0 A; VCTRL = 5.5 V 20
sense voltage in frequency reduction mode Vsense 190 207 225 mV frequency reduction mode; V/t = 0 mV/s; IAUX = 0 A; VCTRL = 1.0 V 20
leading edge blanking time tleb 275 325 375 ns 20
soft start resistance Rstart(soft) 12 kΩ 20
demagnetization detection voltage Vdet(demag) 20 35 50 mV 20
demagnetization detection blanking time tblank(det)demag 1.8 2.2 2.6 µs 20
valley recognition voltage change with time (V/t)vrec 0.25 0.37 0.49 V/s positive V/t 20
valley recognition voltage change with time (V/t)vrec 2.35 1.9 1.45 V/s negative V/t 20
clamp voltage on pin AUX Vclamp(AUX) 4.4 4.8 5.2 V IAUX = 1 mA 20
maximum on-time ton(max) 45 55 65 µs 21
sink current on pin DRIVER Isink(DRIVER) 0.25 0.3 A VDRIVER = 2 V 21
overvoltage protection voltage on pin AUX Vovp(AUX) 2.88 3 3.12 V 21
overvoltage protection detection time tdet(ovp) 1.9 2.3 2.7 µs in the secondary stroke 21
IC protection level temperature Tpl(IC) 130 140 150 °C 21
overpower protection voltage on pin ISENSE counter trigger level Vopp(ISENSE) 450 500 550 mV IAUX = 0.3 mA 21
overpower protection delay time td(opp) 180 200 220 ms normal mode 21
restart delay time td(restart) 720 800 820 ms 21
thermal resistance from junction to ambient Rth(j-a) 91 K/W in free air; JEDEC test board 18
thermal resistance from junction to case Rth(j-c) 37.8 K/W in free air; JEDEC test board 18

CAD (KiCad official)

  • Symbol: TEA18363T
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tea18363t-etched.step / tea18363t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tea18363t.step / tea18363t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: NXP Semicon datasheet (27 pp, sha256 8e998eba15713285, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF