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TDA8034HN

NXP Semicon · Interface - Specialized · VQFN-24-EP(4x4)

TDA8034HN from NXP Semicon, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD(INTF) power_in Interface supply voltage; all interface signals to the system controller are referenced to this supply.
2 VCC_SEL2 input 5 V or 3 V VCC selection input: active HIGH selects VCC = 5 V, and active LOW selects VCC = 3 V when VCC_SEL1 is HIGH.
3 RSTIN input Microcontroller card reset input, active HIGH, referenced to VDD(INTF).
4 VCC_SEL1 input 1.8 V VCC selection input: active LOW selects VCC = 1.8 V, and active HIGH disables the 1.8 V selection.
5 CMDVCCN input Microcontroller input that starts the card activation sequence, active LOW.
6 CLKDIV1 input Sets the card clock frequency on pin CLK together with pin CLKDIV2, per the clock configuration table (Table 4).
7 CLKDIV2 input Sets the card clock frequency on pin CLK together with pin CLKDIV1, per the clock configuration table (Table 4).
8 PRESN input Card presence contact input, active LOW (card considered present when LOW), with built-in debounce typically 8 ms.
9 I/O bidirectional Card input/output data line (C7), protected half-duplex buffered I/O with an internal 11 kΩ pull-up to VCC.
10 AUX1 bidirectional Auxiliary card input/output data line (C4), protected half-duplex buffered I/O with an internal 11 kΩ pull-up to VCC.
11 AUX2 bidirectional Auxiliary card input/output data line (C8), protected half-duplex buffered I/O with an internal 11 kΩ pull-up to VCC.
12 GND power_in Ground reference for the device.
13 CLK output Card clock output (C3), with frequency set by CLKDIV1 and CLKDIV2 and up to 20 MHz.
14 RST output Card reset output (C2), controlled non-inverted by pin RSTIN.
15 VCC power_out Card supply output (C1) regulated to 5 V, 3 V or 1.8 V ±5 %, to be decoupled to GND with a 470 nF capacitor close to the pin and a 220 nF capacitor near the card socket contact, with ESR below 100 m (unit symbol truncated in the extracted text).
16 VDDP power_in Low-dropout regulator input supply: 4.85 V to 5.5 V when VCC_SEL2 is HIGH (VCC = 5 V), and 3 V to 5.5 V when VCC_SEL2 is LOW or VCC_SEL1 is LOW.
17 VDD power_in Digital supply voltage in the range 2.7 V to 3.6 V.
18 PORADJ input Power-on reset threshold adjustment input using an optional external resistor bridge; connect to VDD(INTF) if the bridge is not required.
19 OFFN output NMOS interrupt output to the microcontroller, active LOW, with an internal 20 kΩ pull-up to VDD(INTF).
20 I/OUC bidirectional Microcontroller input/output data line, with an internal 10 kΩ pull-up to VDD(INTF).
21 AUX1UC bidirectional Auxiliary microcontroller input/output data line, with an internal 10 kΩ pull-up to VDD(INTF).
22 AUX2UC bidirectional Auxiliary microcontroller input/output data line, with an internal 10 kΩ pull-up to VDD(INTF).
23 XTAL1 input Crystal connection input, also usable as external clock input up to 26 MHz, referenced to VDD.
24 XTAL2 output Crystal connection output, referenced to VDD.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer NXP Semicon
Package VQFN-24-EP(4x4)
Category Interface
Pins 25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDDP power supply voltage (regulator input), VCC = 5 V VDDP 4.85 5 5.5 V VCC = 5 V 15
VDDP power supply voltage (regulator input), VCC = 3 V or 1.8 V VDDP 3 3.3 5.5 V VCC = 3 V or 1.8 V 15
VDD supply voltage VDD 2.7 3.3 3.6 V 15
VDD(INTF) interface supply voltage VDD(INTF) 1.6 3.3 V 15
Ambient temperature Tamb -25 85 °C 2
VDDP power supply voltage pin VDDP VDDP -0.3 6 V 14
VDD supply voltage pin VDD VDD -0.3 4.6 V 14
VDD(INTF) interface supply voltage pin VDD(INTF) VDD(INTF) -0.3 4.6 V 14
Input voltage pins CMDVCCN, CLKDIV1, CLKDIV2, VCC_SEL1, VCC_SEL2, RSTIN, OFFN, PORADJ, XTAL1, XTAL2, I/OUC, AUX1UC, AUX1UC VI -0.3 4.6 V 14
Card contact pins PRESN, I/O, RST, AUX1, AUX2 and CLK -0.3 6 V 14
Storage temperature Tstg -55 150 °C 14
Junction temperature Tj 125 °C 14
Total power dissipation Ptot 0.25 W Tamb = 25 °C to +85 °C 14
ESD voltage, Human Body Model on card pins VESD -8 8 kV Human Body Model (HBM) on card pins I/O, RST, VCC, AUX1, AUX2, CLK; within typical application 14
ESD voltage, Human Body Model on all other pins VESD -2 2 kV Human Body Model (HBM); all other pins 14
Thermal resistance from junction to ambient (HVQFN24) Rth(j-a) 53 K/W in free air 15
IDD supply current, shutdown mode IDD 35 µA shutdown mode 15
IDD supply current, deep shutdown mode IDD 12 µA deep shutdown mode 15
IDD supply current, active mode IDD 2 mA active mode 15
IDDP power supply current, shutdown mode IDDP 5 µA shutdown mode; fxtal stopped 15
IDDP power supply current, active mode IDDP 1.5 mA active mode; fCLK = 1/2 fxtal; no load 15
IDDP power supply current, active mode with card load IDDP 70 mA active mode; fCLK = 1/2 fxtal; ICC = 65 mA 15
IDD(INTF) interface supply current, shutdown mode IDD(INTF) 6 µA shutdown mode 15
IDD(INTF) interface supply current, active mode IDD(INTF) 2 mA active mode 15
Threshold voltage, pin VDD falling Vth 2.3 2.4 2.5 V no external resistors on pin PORADJ; pin VDD falling 15
Threshold voltage, pin VDDP falling Vth 3 4.1 4.4 V no external resistors on pin PORADJ; pin VDDP falling; VCC = 5 V 15
Threshold voltage with external resistors on PORADJ Vth 1.2 1.24 1.29 V external resistors on pin PORADJ 15
Hysteresis voltage, pin VDD Vhys 50 100 150 mV no external resistors on pin PORADJ; pin VDD 15
Hysteresis voltage, pin VDDP Vhys 100 200 350 mV no external resistors on pin PORADJ; pin VDDP; VCC = 5 V 15
Pulse width tw 5.1 8 10.2 ms 15
Decoupling capacitance connected to VCC Cdec 550 830 nF connected to VCC 15
VCC output voltage, shutdown mode Vo -0.1 0.1 V shutdown mode; no load 16
VCC supply voltage, 5 V card VCC 4.75 5 5.25 V active mode; ICC < 65 mA DC 16
VCC supply voltage, 3 V card VCC 2.85 3.05 3.15 V active mode; ICC < 65 mA DC 16
VCC supply voltage, 1.8 V card VCC 1.71 1.83 1.89 V active mode; ICC < 35 mA DC 16
VCC supply voltage with current pulses, 5 V card VCC 4.65 5 5.25 V active mode; current pulses of 40 nA/s at ICC < 200 mA; t < 400 ns 16
VCC supply voltage with current pulses, 3 V card VCC 2.76 3.2 V active mode; current pulses of 40 nA/s at ICC < 200 mA; t < 400 ns 16
VCC supply voltage with current pulses, 1.8 V card VCC 1.66 1.94 V active mode; current pulses of 15 nA/s at ICC < 200 mA, t < 400 ns 16
Peak-to-peak ripple voltage Vripple(p-p) 350 mV 20 kHz to 200 MHz 16
VCC supply current ICC 65 mA VCC = 0 V to 5 V, 3 V or 1.8 V 16
Slew rate, 5 V card SR 0.055 0.18 0.3 V/µs 5 V card 16
Slew rate, 3 V card SR 0.04 0.18 0.3 V/µs 3 V card 16
Slew rate, 1.8 V card SR 0.025 0.18 0.3 V/µs 1.8 V card 16
Crystal frequency fxtal 2 26 MHz card clock reference; crystal oscillator 16
Output current limit, pin I/O IOlim -15 15 mA pin I/O 20
Output current limit, pin VCC IOlim 135 175 225 mA pin VCC 20
Output current limit, pin CLK IOlim -70 70 mA pin CLK 20
Output current limit, pin RST IOlim -20 20 mA pin RST 20
Shutdown current, pin VCC Isd 90 120 150 mA pin VCC 20
Activation time tact 2090 4160 µs see Figure 7 on page 11 20
Deactivation time tdeact 35 90 250 µs see Figure 8 on page 12 20
Delay time CLK sent to card, td(start) = t3 td(start) 2090 4112 µs CLK sent to card using an external clock 21
Delay time CLK sent to card, td(end) = t5 td(end) 2120 4160 µs CLK sent to card using an external clock 21
Debounce time, pin PRESN tdeb 3.2 4.5 6.4 ms pin PRESN 21
Internal oscillator frequency, shutdown mode fosc(int) 100 150 200 kHz Shutdown mode 18
Internal oscillator frequency, active state fosc(int) 2 2.7 3.2 MHz active state 18
Frequency on pin CLK fCLK 0 20 MHz operational 19
Duty cycle on pin CLK δ 45 55 % CL = 30 pF 19
Pull-up resistance on data lines, connected to VCC Rpu 7 9 11 kΩ connected to VCC 17

CAD (KiCad official)

  • Symbol: TDA8034HN
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: tda8034hn-etched.step / tda8034hn-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tda8034hn.step / tda8034hn.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: NXP Semicon datasheet (32 pp, sha256 9170afcb1af97e4b, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF