component
TD310IDT
Public Made by Adomby adom
STMicroelectronics Gate Drivers, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"component": {
"mpn": "TD310IDT",
"manufacturer": "STMicroelectronics",
"package": "SO-16",
"pin_count": 16,
"category": "Motor Driver ICs",
"subcategory": "Gate Drivers",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588947714386509824",
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"distributor_links": {
"lcsc": "C501103",
"digikey": "497-4052-2-ND",
"mouser": "511-TD310IDT"
},
"distributor_check": {
"checked_at": "2026-10-11T15:11:38Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "497-4052-2-ND",
"status": "found",
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"pins": [
{
"number": "1",
"name": "VCC",
"type": "power_in",
"description": "Supply voltage operates from 4 V to 16 V (absolute maximum 18 V) and should be decoupled with a 1 µF minimum capacitor."
},
{
"number": "2",
"name": "INA",
"type": "input",
"description": "CMOS/LSTTL compatible inverting logic input with hysteresis that controls output channel A."
},
{
"number": "3",
"name": "INB",
"type": "input",
"description": "CMOS/LSTTL compatible inverting logic input with hysteresis that controls output channel B."
},
{
"number": "4",
"name": "INC",
"type": "input",
"description": "CMOS/LSTTL compatible inverting logic input with hysteresis that controls output channel C."
},
{
"number": "5",
"name": "Enable",
"type": "input",
"description": "Enable input that, together with the sense comparator and the buffer inputs, determines the buffer outputs."
},
{
"number": "6",
"name": "Alarm",
"type": "output",
"description": "Alarm output signals an overcurrent event to the controller, falling within 500 ns of a sense trigger and sinking 5 to 35 mA at VO = 0.8 V."
},
{
"number": "7",
"name": "OA Output",
"type": "output",
"description": "Output of the uncommitted operational amplifier, which can be used for current measurement before an A/D input or for other general-purpose use."
},
{
"number": "8",
"name": "OA Input +",
"type": "input",
"description": "Non-inverting input of the uncommitted operational amplifier, with a common-mode input range of 0 to VCC - 1.5 V."
},
{
"number": "9",
"name": "Sense +",
"type": "input",
"description": "Non-inverting input of the current sense comparator; when it exceeds Sense -, the output drivers are inhibited and the alarm is asserted, with 40 mV sense hysteresis."
},
{
"number": "10",
"name": "OA Input -",
"type": "input",
"description": "Inverting input of the uncommitted operational amplifier, with a common-mode input range of 0 to VCC - 1.5 V."
},
{
"number": "11",
"name": "Sense -",
"type": "input",
"description": "Inverting (reference) input of the current sense comparator used with Sense + to detect overcurrent."
},
{
"number": "12",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "13",
"name": "OUTC",
"type": "output",
"description": "Driver output channel C, rated for 0.6 A peak with a sourcing drop of 3 V and a sinking drop of 5 V at 200 mA."
},
{
"number": "14",
"name": "OUTB",
"type": "output",
"description": "Driver output channel B, rated for 0.6 A peak with a sourcing drop of 3 V and a sinking drop of 5 V at 200 mA."
},
{
"number": "15",
"name": "OUTA",
"type": "output",
"description": "Driver output channel A, rated for 0.6 A peak with a sourcing drop of 3 V and a sinking drop of 5 V at 200 mA."
},
{
"number": "16",
"name": "UVLO/Stby",
"type": "input",
"description": "Resistor bridge sets the undervoltage lockout (VUVLO = 1.2 V × (R1+R2)/R1, default internal 12 V) and standby mode: low selects standby (30 µA, outputs low), mid selects UVLO, high selects normal operation (1.5 mA)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The PIN CONNECTIONS text extraction is scrambled (names and numbers are listed separately). The mapp; UVLO/Stby is a multi-level pin (low, mid, high voltage states) rather than a simple logic input; it ; The datasheet names the Enable input but gives no dedicated threshold beyond the general logic VIH/V"
],
"pages_sent": 9,
"cost_usd": 0.0453,
"at": "2026-10-11T15:11:22"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588947714386509824",
"pages": 9,
"sha256": "185654f9a04b7be5",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
"cites_pages": true,
"refuses_to_fabricate": true
}
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