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td1837

Public Made by Adom

by adom

Techcode Semicon DC-DC Converters, ESOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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README

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TD1837

Techcode Semicon · DC-DC Converters · ESOP-8

TD1837 from Techcode Semicon, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW output Switch Node. Output from the internal high-side power MOSFET (250mΩ RDS(on)). Requires an external low-VF Schottky rectifier to ground placed close to the pin to reduce switching spikes. Switch voltage range -0.5V to VIN+0.5V.
2 EN input Enable Input (positive logic). Pulling below the falling threshold (~1.7V) or leaving floating shuts the chip down; pulling above the rising threshold (~1.9V, spec 1.3V min to 2.2V max) enables the chip. Internal ~1MΩ pull-down to GND.
3 COMP output Compensation. Output of the internal GM error amplifier. Connect an external R-C compensation network here to set loop dynamics. Internally clamped between ~0.9V (min) and ~2.0V (max) during operation; do not drive above 2.6V.
4 FB input Feedback. Inverting input to the internal error amplifier. An external resistive divider from VOUT to GND sets the output voltage; the divider is compared to the internal 0.8V reference (VFB = 0.780V to 0.820V).
5 GND power_in Ground. Common return for the device and shared with the exposed thermal pad. Connect as close as possible to the output capacitor while avoiding high-current switch paths. The exposed pad must be tied to the GND plane for optimal thermal performance.
6 FREQ input Switching Frequency Program Input. Connect a resistor RFREQ from this pin to ground to program the oscillator frequency (up to 1MHz). RFREQ(kΩ) = 100000/fs(kHz) − 5. For VIN ≥ 64V, set fsw below 400kHz.
7 VIN power_in Input Supply. Supplies all internal control circuitry, bootstrap regulators, and the high-side power MOSFET. Absolute maximum 80V (operating range 12V to 80V; VIN UVLO ~7.2V rising, ~6.5V falling). A decoupling capacitor to ground must be placed close to this pin.
8 BST power_in Bootstrap. Positive supply for the internal floating high-side MOSFET gate driver. Connect a bypass capacitor (typ. 0.1μF) between BST and SW. Internally regulated to ~5V above SW; BST-to-SW absolute maximum is +5V.
EP GND power_in Exposed thermal pad on the bottom of the ESOP-8 package. Electrically tied to GND (pin 5). Solder to a large GND copper area for optimal thermal performance.

Key specifications

Parameter Value
Manufacturer Techcode Semicon
Package ESOP-8
Category PMIC
Pins 9

Ordering variants

  • TD1837M
  • TD1837MR

CAD (KiCad official)

  • Symbol: TD1837
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: td1837-etched.step / td1837-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); td1837.step / td1837.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Techcode Semicon datasheet (None pp, sha256 664614e8ad9c691d, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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