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TCAN3403DRBRQ1

TEXAS INSTRUMENTS · Global Sourcing Parts · SON-8-EP(3x3)

TCAN3403DRBRQ1 from TEXAS INSTRUMENTS, in a SON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TXD input CAN transmit data logic input with an integrated pull-up, referenced to VIO on the TCAN3403-Q1; absolute maximum is -0.3 V to 6 V.
2 GND power_in Ground connection that must be connected to the PCB ground.
3 VCC power_in 3.3 V supply voltage; recommended range is 3 V to 3.6 V with absolute maximum of -0.3 V to 6 V.
4 RXD output CAN receive data logic output, referenced to VIO on the TCAN3403-Q1 and tri-stated when the device is powered off; absolute maximum output current is 8 mA.
5 VIO power_in I/O supply voltage for the logic interface on the TCAN3403-Q1, supporting 1.7 V to 3.6 V (not present on TCAN3404-Q1, where this pin is SHDN).
6 CANL bidirectional Low-level CAN bus input/output line; CANH and CANL bus voltage is limited to -58 V to 58 V.
7 CANH bidirectional High-level CAN bus input/output line; CANH and CANL bus voltage is limited to -58 V to 58 V.
8 STB input Standby mode control input with an integrated pull-up; leaving it floating or high puts the device in standby mode, and tying it to GND selects normal mode.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer TEXAS INSTRUMENTS
Package SON-8-EP(3x3)
Category Global Sourcing Parts
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.3 6 V 4
Supply voltage I/O level shifter (only for TCAN3403) VIO -0.3 6 V 4
CAN bus I/O voltage range on CANH and CANL VBUS -58 58 V 4
Max differential voltage between CANH and CANL VDIFF -58 58 V VDIFF = (CANH - CANL) 4
Logic pin input voltage (TXD, STB, SHDN) VLogic_Input -0.3 6 V 4
Logic output voltage range (RXD) VRXD -0.3 6 V 4
RXD output current IO(RXD) -8 8 mA 4
Junction temperature TJ -40 165 °C 4
Storage temperature TSTG -65 150 °C 4
Supply voltage VCC 3 3.3 3.6 V 4
Supply voltage for I/O level shifter (only for TCAN3403) VIO 1.7 3.6 V 5
RXD terminal high-level output current IOH(RXD) -2 mA 5
RXD terminal low-level output current IOL(RXD) 2 mA 5
RXD terminal high-level output current (only for TCAN3403) IOH(RXD) -1.5 mA 5
RXD terminal low-level output current (only for TCAN3403) IOL(RXD) 1.5 mA 5
Junction temperature TJ -40 150 °C 5
Supply current normal mode, dominant ICC 42 55 mA TXD = 0 V, STB = 0 V, RL = 60 Ω, CL = open 5
Supply current normal mode, dominant ICC 50 60 mA TXD = 0 V, STB = 0 V, RL = 50 Ω, CL = open 5
Supply current normal mode, recessive ICC 7 8.2 mA TXD = VCC, STB = 0 V, RL = 50 Ω, CL = open 5
Supply current normal mode, dominant with bus fault ICC 130 mA TXD = 0 V, STB = 0 V, CANH = CANL = ±25 V, RL = open, CL = open 5
Supply current standby mode (TCAN3403) ICC 1 2 µA TXD = STB = VIO, RL = 50 Ω, CL = open, TJ <= 85 °C 5
I/O supply current normal mode, dominant (TCAN3403) IIO 125 300 µA TXD = 0 V, STB = 0 V, RL = 60 Ω, CL = open, RXD floating 6
I/O supply current normal mode, recessive (TCAN3403) IIO 19 48 µA TXD = VIO, STB = 0 V, RL = 60 Ω, CL = open, RXD floating 6
Undervoltage detection VCC rising UVCC(R) 2.75 2.9 V Ramp up 6
Undervoltage detection on VCC falling UVCC(F) 2.5 2.65 V Ramp down 6
Undervoltage detection VIO rising (TCAN3403) UVIO(R) 1.6 1.65 V Ramp up 6
Undervoltage detection on VIO falling (TCAN3403) UVIO(F) 1.4 1.5 V Ramp down 6
Dominant output voltage normal mode, CANH VO(DOM) 2.25 V TXD = 0 V, STB, SHDN = 0 V, 50 Ω ≤ RL ≤ 65 Ω, CL = open 6
Dominant output voltage normal mode, CANL VO(DOM) 0.5 1.25 V TXD = 0 V, STB, SHDN = 0 V, 50 Ω ≤ RL ≤ 65 Ω, CL = open 6
Recessive output voltage normal mode CANH and CANL VO(REC) 1.5 1.9 2.25 V TXD = VIO or VCC, STB, SHDN = 0 V, RL = open (no load), CL = open 6
Driver symmetry VSYM 0.9 1.1 V/V TXD = 250 kHz, 1 MHz, 2.5 MHz, STB, SHDN = 0 V, RL = 60, CSPLIT = 4.7 nF, CL = open 7
DC output symmetry VSYM_DC -400 400 mV STB, SHDN = 0 V, RL = 60 Ω, CL = open 7
Differential output voltage normal mode, dominant VOD(DOM) 1.5 3 V TXD = 0 V, STB, SHDN = 0 V, 50 Ω ≤ RL ≤ 65 Ω, CL = open 7
Differential output voltage normal mode, dominant VOD(DOM) 1.5 3.4 V TXD = 0 V, STB, SHDN = 0 V, RL = 2240 Ω, CL = open 7
Differential output voltage normal mode, recessive VOD(REC) -120 12 mV TXD = VIO or VCC, STB, SHDN = 0 V, RL = 60 Ω, CL = open 7
Differential output voltage normal mode, recessive VOD(REC) -50 50 mV TXD = VIO or VCC, STB, SHDN = 0 V, RL = open, CL = open 7
Short-circuit bus output current, dominant, normal mode IOS(DOM) -115 115 mA V(CANH) = -15 V to 40 V, CANL = open, TXD = 0 V 7
Input threshold voltage normal mode VIT 500 900 mV -30 V ≤ VCM ≤ 30 V, STB, SHDN= 0 V 7
Input threshold standby mode, TCAN3403 VIT(STB) 400 1150 mV VIO = 3 V to 3.6 V, -30 V ≤ VCM ≤ 30 V, STB= VIO 7
Normal mode dominant state differential input voltage range VDOM 0.9 9 V -30 V ≤ VCM ≤ 30 V, STB, SHDN= 0 V 7
Normal mode recessive state differential input voltage range VREC -4 0.5 V -30 V ≤ VCM ≤ 30 V, STB, SHDN= 0 V 7
Standby mode dominant state differential input voltage range VDOM(STB) 1.15 9 V SHDN= 0 V, STB = VIO, -30 V ≤ VCM ≤ 30 V 7
Common mode range normal and standby modes VCM -30 30 V 8
Input differential resistance RID 25 50 kΩ TXD = VIO, STB = 0 V, -30 V ≤ VCM ≤ 30 V 8
Single ended input resistance (CANH or CANL) RIN 13 25 kΩ 8
High-level input leakage current TXD IIH -2.5 0 1 µA TXD = VCC = VIO = 3.6 V 8
Low-level input leakage current TXD IIL -200 -100 -20 µA TXD = 0 V, VCC = VIO = 3.6 V 8
High-level input leakage current STB IIH -2 2 µA VCC = VIO = STB = 3.6 V 8
Low-level input leakage current STB IIL -20 -2 µA VCC = VIO = 3.6 V, STB = 0 V 8
Device loop delay, driver input (TXD) to receiver output (RXD), recessive to dominant tPROP(LOOP1) 95 180 ns normal mode, VCC = VIO = 3 V to 3.6 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF 9
Device loop delay, driver input (TXD) to receiver output (RXD), dominant to recessive tPROP(LOOP2) 120 180 ns normal mode, VCC = VIO = 3 V to 3.6 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF 9
Propagation delay time, low-to-high TXD edge to driver recessive tprop(TxD-busrec) 65 100 ns See 图 7-2, STB, SHDN = 0 V, RL = 60 Ω, CL = 100 pF, VCC = VIO = 3 V to 3.6 V 9
Propagation delay time, high-to-low TXD edge to driver dominant tprop(TxD-busdom) 46 100 ns See 图 7-2, STB, SHDN = 0 V, RL = 60 Ω, CL = 100 pF, VCC = VIO = 3 V to 3.6 V 10
Differential output signal rise time tR 32 57 ns See 图 7-2, STB, SHDN = 0 V, RL = 60 Ω, CL = 100 pF 10
Differential output signal fall time tF 30 50 ns See 图 7-2, STB, SHDN = 0 V, RL = 60 Ω, CL = 100 pF 10
Propagation delay time, bus recessive input to RXD high output tprop(busrec-RXD) 55 90 ns See 图 7-3, STB, SHDN = 0 V, CL(RXD) = 15 pF, VCC = VIO = 3 V to 3.6 V 10
Propagation delay time, bus dominant input to RXD low output tprop(busdom-RXD) 45 90 ns See 图 7-3, STB, SHDN = 0 V, CL(RXD) = 15 pF, VCC = VIO = 3 V to 3.6 V 10
Junction-to-ambient thermal resistance (DRB VSON package) RΘJA 50.9 ℃/W 5

CAD (KiCad official)

  • Symbol: TCAN3403DRBRQ1
  • Footprint: Package_SON:WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm
  • 3D model: SON-8-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tcan3403drbrq1-etched.step / tcan3403drbrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tcan3403drbrq1.step / tcan3403drbrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TEXAS INSTRUMENTS datasheet (46 pp, sha256 78c6678aaa98c8fe, retrieved 2026-10-20, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF