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TCAN1042VDRQ1

Public Made by Adom

by adom

Texas Instruments CAN Controllers, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs tcan1042vdrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers tcan1042vdrq1: viewers · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
page.json tcan1042vdrq1: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 19h ago
README.md tcan1042vdrq1: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 16d ago
tcan1042vdrq1-etched.fit.json tcan1042vdrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tcan1042vdrq1-etched.glb tcan1042vdrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tcan1042vdrq1-etched.step tcan1042vdrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tcan1042vdrq1.glb Publish 0.1.0 · Ray 1mo ago
tcan1042vdrq1.kicad_mod Publish 0.1.0 · Ray 1mo ago
tcan1042vdrq1.kicad_sym Publish 0.1.0 · Ray 1mo ago
tcan1042vdrq1.lbr Publish 0.1.0 · Ray 1mo ago
tcan1042vdrq1.step Publish 0.1.0 · Ray 1mo ago

TCAN1042VDRQ1

Texas Instruments · CAN Controllers · SOIC-8

TCAN1042VDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TXD input CAN transmit data input from the host MCU/controller. LOW drives a dominant bus state, HIGH allows recessive. Logic thresholds are 0.7×VIO / 0.3×VIO on the V-suffix variant. Includes a dominant time-out (DTO) protection for data rates down to 10 kbps.
2 GND power_in Device ground reference. All voltages except differential bus voltages are referenced to this terminal.
3 VCC power_in 5-V transceiver supply voltage input. Recommended operating range 4.5 V to 5.5 V; absolute max 7 V. Undervoltage lockout on VCC (rising ~4.2 V, falling ~4.0 V) protects the bus during power sequencing.
4 RXD output CAN receive data output to the host MCU/controller. LOW indicates a dominant bus state, HIGH indicates recessive. Output is driven to VIO on 'V' suffix devices (this variant). IO drive limit ±2 mA over recommended conditions (absolute max ±8 mA).
5 VIO power_in I/O level-shifting supply input (present on 'V' suffix devices only, including TCAN1042VDRQ1). Sets the logic reference for TXD, STB, and RXD so the transceiver can interface directly to 3.3 V or 5 V MCUs. Recommended range 3 V to 5.5 V; absolute max 7 V. Independent undervoltage detection (UVVIO) at ~1.3-2.75 V.
6 CANL bidirectional Low-side CAN bus I/O line. Forms the differential pair with CANH. Fault protected to ±58 V (non-H variants such as this V-suffix part) with respect to GND. ±30 V receiver common-mode input range; ±15 kV IEC ESD.
7 CANH bidirectional High-side CAN bus I/O line. Forms the differential pair with CANL. Fault protected to ±58 V (non-H variants) with respect to GND. ±30 V receiver common-mode input range; ±15 kV IEC ESD.
8 STB input Standby mode control input (active HIGH). Drive LOW for normal mode; drive HIGH to place the transceiver into low-power standby with remote wake (WUP) monitoring on the bus. Logic thresholds are 0.7×VIO / 0.3×VIO on this V-suffix variant.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Interface
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • TCAN1042VDRQ1
  • TCAN1042VDRQ1D
  • TCAN1042VDRQ1DRB

CAD (KiCad official)

  • Symbol: TCAN1042VDRQ1
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tcan1042vdrq1-etched.step / tcan1042vdrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tcan1042vdrq1.step / tcan1042vdrq1.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tcan1042vdrq1.step 122 KB You want the bare part, or you mark your own boards.
tcan1042vdrq1-etched.step 2.2 MB You want the part with TCAN1042VDRQ1 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 565 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 b419d90f0d678231, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF