component
TCAN1042HGVDRBRQ1
Public Made by Adomby adom
Texas Instruments CAN Transceivers, HVSON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TCAN1042HGVDRBRQ1
Texas Instruments · CAN Transceivers · HVSON-8-EP(3x3)
TCAN1042HGVDRBRQ1 from Texas Instruments, in a HVSON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXD | input | CAN transmit data input; LOW for dominant and HIGH for recessive bus states. |
| 2 | GND | power_in | Ground connection; for the DRB (VSON) package the thermal pad may be connected to GND to optimize thermal characteristics. |
| 3 | VCC | power_in | Transceiver 5-V supply voltage. |
| 4 | RXD | output | CAN receive data output; LOW for dominant and HIGH for recessive bus states. |
| 5 | VIO | power_in | Transceiver I/O level shifting supply voltage; available on devices with the V suffix only. |
| 6 | CANL | bidirectional | Low level CAN bus input/output line. |
| 7 | CANH | bidirectional | High level CAN bus input/output line. |
| 8 | STB | input | Standby Mode control input, active high. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HVSON-8-EP(3x3) |
| Category | Interface |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 5-V bus supply voltage range | VCC | -0.3 | 7 | V | 6 | ||
| I/O level shifting voltage range (V suffix) | VIO | -0.3 | 7 | V | 6 | ||
| CAN bus I/O voltage range (CANH, CANL), H variant | VBUS | -70 | 70 | V | 6 | ||
| Max differential voltage between CANH and CANL, H variant | V(Diff) | -70 | 70 | V | 6 | ||
| Logic output terminal voltage range (RXD) | V(Logic_Output) | -0.3 | 7 | V | and VI ≤ VIO + 0.3 V | 6 | |
| Logic input terminal voltage range (TXD, STB) | V(Logic_Input) | -0.3 | 7 | V | and VI ≤ VIO + 0.3 V | 6 | |
| RXD (receiver) output current | IO(RXD) | -8 | 8 | mA | 6 | ||
| Virtual junction temperature range | TJ | -55 | 150 | °C | 6 | ||
| Storage temperature range | TSTG | -65 | 150 | °C | 6 | ||
| 5-V bus supply voltage range | VCC | 4.5 | 5.5 | V | 8 | ||
| I/O level-shifting voltage range | VIO | 3 | 5.5 | V | 8 | ||
| RXD terminal LOW level output current | IOL(RXD) | 2 | mA | 8 | |||
| RXD terminal HIGH level output current | IOH(RXD) | -2 | mA | 8 | |||
| Junction-to-air thermal resistance | RθJA | 48.3 | °C/W | High-K thermal resistance, DRB (VSON) | 8 | ||
| Junction-to-board thermal resistance | RθJB | 17.2 | °C/W | DRB (VSON) | 8 | ||
| Junction-to-case (top) thermal resistance | RθJC(TOP) | 37.6 | °C/W | DRB (VSON) | 8 | ||
| Junction-to-top characterization parameter | ΨJT | 1.8 | °C/W | DRB (VSON) | 8 | ||
| Junction-to-board characterization parameter | ΨJB | 17.1 | °C/W | DRB (VSON) | 8 | ||
| Thermal shutdown temperature | TTSD | 170 | °C | 8 | |||
| Thermal shutdown hysteresis | TTSD_HYS | 5 | °C | 8 | |||
| Supply current, normal mode dominant | ICC | 40 | 70 | mA | TXD = 0 V, RL = 60 Ω, CL = open, RCM = open, STB = 0 V, typical bus load | 9 | |
| Supply current, normal mode dominant high bus load | ICC | 45 | 80 | mA | TXD = 0 V, RL = 50 Ω, CL = open, RCM = open, STB = 0 V, high bus load | 9 | |
| Supply current, normal mode dominant with bus fault | ICC | 110 | mA | TXD = 0 V, STB = 0 V, CANH = -12 V, RL = open, CL = open, RCM = open | 9 | ||
| Supply current, normal mode recessive | ICC | 1.5 | 2.5 | mA | TXD = VCC or VIO, RL = 50 Ω, CL = open, RCM = open, STB = 0 V | 9 | |
| Supply current, standby mode (V suffix) | ICC | 0.5 | 5 | µA | Devices with V suffix, TXD = VIO, RL = 50 Ω, CL = open, RCM = open, STB = VIO | 9 | |
| I/O supply current, normal mode | IIO | 90 | 300 | µA | RXD floating, TXD = STB = 0 or 5.5 V | 9 | |
| I/O supply current, standby mode | IIO | 12 | 17 | µA | RXD floating, TXD = STB = VIO, VCC = 0 or 5.5 V | 9 | |
| Rising undervoltage detection on VCC for protected mode | UVVCC | 4.2 | 4.4 | V | All devices | 9 | |
| Falling undervoltage detection on VCC for protected mode | UVVCC | 3.8 | 4 | 4.25 | V | All devices | 9 |
| Hysteresis voltage on UVVCC | VHYS(UVVCC) | 200 | mV | 9 | |||
| Undervoltage detection on VIO for protected mode (V suffix) | UVVIO | 1.3 | 2.75 | V | Devices with V suffix (I/O level-shifting) | 9 | |
| Hysteresis voltage on UVVIO for protected mode | VHYS(UVVIO) | 80 | mV | 9 | |||
| STB unpowered leakage current | Ilkg(OFF) | -1 | 0 | 1 | µA | STB = 5.5 V, VCC = VIO = 0 V | 9 |
| TXD unpowered leakage current | Ilkg(OFF) | -1 | 0 | 1 | µA | TXD = 5.5 V, VCC = VIO = 0 V | 9 |
| Input capacitance | CI | 5 | pF | VIN = 0.4 x sin(2 x π x 2 x 10^6 x t) + 2.5 V | 9 | ||
| RXD unpowered leakage current | Ilkg(OFF) | -1 | 0 | 1 | µA | RXD = 5.5 V, VCC = 0 V, VIO = 0 V | 10 |
| Bus output voltage (dominant) CANH | VO(DOM) | 2.75 | 4.5 | V | TXD = 0 V, STB = 0 V, 50 Ω ≤ RL ≤ 65 Ω, CL = open, RCM = open | 10 | |
| Bus output voltage (dominant) CANL | VO(DOM) | 0.5 | 2.25 | V | TXD = 0 V, STB = 0 V, 50 Ω ≤ RL ≤ 65 Ω, CL = open, RCM = open | 10 | |
| Bus output voltage (recessive) CANH and CANL | VO(REC) | 2 | 3 | V | TXD = VCC or VIO, VIO = VCC, STB = 0 V, RL = open (no load), RCM = open | 10 | |
| Bus output voltage (standby mode) CANH | VO(STB) | -0.1 | 0 | 0.1 | V | STB = VIO, RL = open (no load), RCM = open | 10 |
| Bus output voltage (standby mode) CANL | VO(STB) | -0.1 | 0 | 0.1 | V | STB = VIO, RL = open (no load), RCM = open | 10 |
| Bus output voltage (standby mode) CANH - CANL | VO(STB) | -0.2 | 0 | 0.2 | V | STB = VIO, RL = open (no load), RCM = open | 10 |
| Differential output voltage (dominant) CANH - CANL | VOD(DOM) | 1.4 | 3 | V | TXD = 0 V, STB = 0 V, 45 Ω ≤ RL < 50 Ω, CL = open, RCM = open | 10 | |
| Differential output voltage (dominant) CANH - CANL | VOD(DOM) | 1.5 | 3 | V | TXD = 0 V, STB = 0 V, 50 Ω ≤ RL ≤ 65 Ω, CL = open, RCM = open | 10 | |
| Differential output voltage (dominant) CANH - CANL | VOD(DOM) | 1.5 | 5 | V | TXD = 0 V, STB = 0 V, RL = 2240 Ω, CL = open, RCM = open | 10 | |
| Differential output voltage (recessive) CANH - CANL | VOD(REC) | -120 | 12 | mV | TXD = VCC, STB = 0 V, RL = 60 Ω, CL = open, RCM = open | 10 | |
| Differential output voltage (recessive) CANH - CANL | VOD(REC) | -50 | 50 | mV | TXD = VCC, STB = 0 V, RL = open (no load), CL = open, RCM = open | 10 | |
| Output symmetry (dominant or recessive) | VSYM | 0.9 | 1.1 | V/V | (VO(CANH) + VO(CANL)) / VCC, STB at 0 V, Rterm = 60 Ω, Csplit = 4.7 nF, CL = open, RCM = open, TXD = 250 kHz, 1 MHz | 10 | |
| DC output symmetry (dominant or recessive) | VSYM_DC | -0.4 | 0.4 | V | (VCC, VO(CANH), VO(CANL)), STB = 0 V, RL = 60 Ω, CL = open, RCM = open | 10 | |
| Short-circuit steady-state output current, dominant, CANH | IOS(SS_DOM) | -100 | mA | STB at 0 V, VCANH = -5 V to 40 V, CANL = open, TXD = 0 V | 10 | ||
| Short-circuit steady-state output current, dominant, CANL | IOS(SS_DOM) | 100 | mA | STB at 0 V, VCANL = -5 V to 40 V, CANH = open, TXD = 0 V | 10 | ||
| Short-circuit steady-state output current, recessive, normal mode | IOS(SS_REC) | -5 | 5 | mA | STB at 0 V, -27 V ≤ VBUS ≤ 32 V, VBUS = CANH = CANL, TXD = VCC | 10 | |
| Common mode range, normal mode | VCM | -30 | 30 | V | STB = 0 V | 11 | |
| Positive-going input threshold voltage, normal mode (CM ±20 V) | VIT+ | 900 | mV | STB = 0 V, -20 V ≤ VCM ≤ +20 V | 11 | ||
| Negative-going input threshold voltage, normal mode (CM ±20 V) | VIT- | 500 | mV | STB = 0 V, -20 V ≤ VCM ≤ +20 V | 11 | ||
| Positive-going input threshold voltage, normal mode (CM ±30 V) | VIT+ | 1000 | mV | STB = 0 V, -30 V ≤ VCM ≤ +30 V | 11 | ||
| Negative-going input threshold voltage, normal mode (CM ±30 V) | VIT- | 400 | mV | STB = 0 V, -30 V ≤ VCM ≤ +30 V | 11 | ||
| Hysteresis voltage (VIT+ - VIT-), normal mode | VHYS | 120 | mV | STB = 0 V | 11 | ||
| Common mode range, standby mode (V suffix), 4.5 V ≤ VIO ≤ 5.5 V | VCM | -12 | 12 | V | STB = VIO, Devices with V suffix | 11 | |
| Common mode range, standby mode (V suffix), 3.0 V ≤ VIO ≤ 4.5 V | VCM | -2 | 7 | V | STB = VIO, Devices with V suffix | 11 | |
| Input threshold voltage, standby mode | VIT(STANDBY) | 400 | 1150 | mV | STB = VCC or VIO | 11 | |
| Power-off (unpowered) bus input leakage current | ILKG(IOFF) | 4.8 | µA | CANH = CANL = 5 V, VCC = VIO = 0 V | 11 | ||
| Input capacitance to ground (CANH or CANL) | CI | 24 | 30 | pF | TXD = VCC, VIO = VCC | 11 | |
| Differential input capacitance (CANH to CANL) | CID | 12 | 15 | pF | TXD = VCC, VIO = VCC | 11 | |
| Differential input resistance | RID | 30 | 80 | kΩ | TXD = VCC = VIO = 5 V, STB = 0 V, -30 V ≤ VCM ≤ +30 V | 11 | |
| Input resistance (CANH or CANL) | RIN | 15 | 40 | kΩ | 11 | ||
| Input resistance matching | RIN(M) | -2 | 2 | % | [1, RIN(CANH) / RIN(CANL)] × 100%, VCANH = VCANL = 5 V | 11 | |
| Total loop delay, recessive to dominant | tPROP(LOOP1) | 100 | 160 | ns | STB = 0 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF | 12 | |
| Total loop delay, dominant to recessive | tPROP(LOOP2) | 110 | 175 | ns | STB = 0 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF | 12 | |
| Mode change time, Normal to Standby or Standby to Normal | tMODE | 9 | 45 | µs | See Figure 8-3 | 12 | |
| Filter time for valid wake up pattern | tWK_FILTER | 0.5 | 1.8 | µs | 12 | ||
| Dominant timeout | tTXD_DTO | 1.2 | 3.8 | ms | STB = 0 V, RL = 60 Ω, CL = open | 12 | |
| Bit time on CAN bus output pins, tBIT(TXD) = 500 ns, all devices | tBIT(BUS) | 435 | 530 | ns | STB = 0 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF | 12 | |
| Bit time on RXD output pins, tBIT(TXD) = 500 ns, all devices | tBIT(RXD) | 400 | 550 | ns | 12 | ||
| Receiver timing symmetry, tBIT(TXD) = 500 ns, all devices | ΔtREC | -65 | 40 | ns | 12 | ||
| Bit time on CAN bus output pins, tBIT(TXD) = 200 ns, G variants | tBIT(BUS) | 155 | 210 | ns | G device variants only | 12 | |
| Bit time on RXD output pins, tBIT(TXD) = 200 ns, G variants | tBIT(RXD) | 120 | 220 | ns | G device variants only | 12 | |
| Receiver timing symmetry, tBIT(TXD) = 200 ns, G variants | ΔtREC | -45 | 15 | ns | G device variants only | 12 |
CAD (KiCad official)
- Symbol:
TCAN1042HGVDRBRQ1 - Footprint:
Package_SON:HVSON-8-1EP_3x3mm_P0.65mm_EP1.6x2.4mm - 3D model: HVSON-8-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
tcan1042hgvdrbrq1-etched.step/tcan1042hgvdrbrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tcan1042hgvdrbrq1.step/tcan1042hgvdrbrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (51 pp, sha256
fe80d6638522457f, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TCAN1042HGVDRBRQ1
**Texas Instruments** · CAN Transceivers · HVSON-8-EP(3x3)
TCAN1042HGVDRBRQ1 from Texas Instruments, in a HVSON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXD | input | CAN transmit data input; LOW for dominant and HIGH for recessive bus states. |
| 2 | GND | power_in | Ground connection; for the DRB (VSON) package the thermal pad may be connected to GND to optimize thermal characteristics. |
| 3 | VCC | power_in | Transceiver 5-V supply voltage. |
| 4 | RXD | output | CAN receive data output; LOW for dominant and HIGH for recessive bus states. |
| 5 | VIO | power_in | Transceiver I/O level shifting supply voltage; available on devices with the V suffix only. |
| 6 | CANL | bidirectional | Low level CAN bus input/output line. |
| 7 | CANH | bidirectional | High level CAN bus input/output line. |
| 8 | STB | input | Standby Mode control input, active high. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HVSON-8-EP(3x3) |
| Category | Interface |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 5-V bus supply voltage range | VCC | -0.3 | | 7 | V | | 6 |
| I/O level shifting voltage range (V suffix) | VIO | -0.3 | | 7 | V | | 6 |
| CAN bus I/O voltage range (CANH, CANL), H variant | VBUS | -70 | | 70 | V | | 6 |
| Max differential voltage between CANH and CANL, H variant | V(Diff) | -70 | | 70 | V | | 6 |
| Logic output terminal voltage range (RXD) | V(Logic_Output) | -0.3 | | 7 | V | and VI ≤ VIO + 0.3 V | 6 |
| Logic input terminal voltage range (TXD, STB) | V(Logic_Input) | -0.3 | | 7 | V | and VI ≤ VIO + 0.3 V | 6 |
| RXD (receiver) output current | IO(RXD) | -8 | | 8 | mA | | 6 |
| Virtual junction temperature range | TJ | -55 | | 150 | °C | | 6 |
| Storage temperature range | TSTG | -65 | | 150 | °C | | 6 |
| 5-V bus supply voltage range | VCC | 4.5 | | 5.5 | V | | 8 |
| I/O level-shifting voltage range | VIO | 3 | | 5.5 | V | | 8 |
| RXD terminal LOW level output current | IOL(RXD) | | | 2 | mA | | 8 |
| RXD terminal HIGH level output current | IOH(RXD) | | | -2 | mA | | 8 |
| Junction-to-air thermal resistance | RθJA | | 48.3 | | °C/W | High-K thermal resistance, DRB (VSON) | 8 |
| Junction-to-board thermal resistance | RθJB | | 17.2 | | °C/W | DRB (VSON) | 8 |
| Junction-to-case (top) thermal resistance | RθJC(TOP) | | 37.6 | | °C/W | DRB (VSON) | 8 |
| Junction-to-top characterization parameter | ΨJT | | 1.8 | | °C/W | DRB (VSON) | 8 |
| Junction-to-board characterization parameter | ΨJB | | 17.1 | | °C/W | DRB (VSON) | 8 |
| Thermal shutdown temperature | TTSD | | 170 | | °C | | 8 |
| Thermal shutdown hysteresis | TTSD_HYS | | 5 | | °C | | 8 |
| Supply current, normal mode dominant | ICC | | 40 | 70 | mA | TXD = 0 V, RL = 60 Ω, CL = open, RCM = open, STB = 0 V, typical bus load | 9 |
| Supply current, normal mode dominant high bus load | ICC | | 45 | 80 | mA | TXD = 0 V, RL = 50 Ω, CL = open, RCM = open, STB = 0 V, high bus load | 9 |
| Supply current, normal mode dominant with bus fault | ICC | | | 110 | mA | TXD = 0 V, STB = 0 V, CANH = -12 V, RL = open, CL = open, RCM = open | 9 |
| Supply current, normal mode recessive | ICC | | 1.5 | 2.5 | mA | TXD = VCC or VIO, RL = 50 Ω, CL = open, RCM = open, STB = 0 V | 9 |
| Supply current, standby mode (V suffix) | ICC | | 0.5 | 5 | µA | Devices with V suffix, TXD = VIO, RL = 50 Ω, CL = open, RCM = open, STB = VIO | 9 |
| I/O supply current, normal mode | IIO | | 90 | 300 | µA | RXD floating, TXD = STB = 0 or 5.5 V | 9 |
| I/O supply current, standby mode | IIO | | 12 | 17 | µA | RXD floating, TXD = STB = VIO, VCC = 0 or 5.5 V | 9 |
| Rising undervoltage detection on VCC for protected mode | UVVCC | 4.2 | | 4.4 | V | All devices | 9 |
| Falling undervoltage detection on VCC for protected mode | UVVCC | 3.8 | 4 | 4.25 | V | All devices | 9 |
| Hysteresis voltage on UVVCC | VHYS(UVVCC) | | 200 | | mV | | 9 |
| Undervoltage detection on VIO for protected mode (V suffix) | UVVIO | 1.3 | | 2.75 | V | Devices with V suffix (I/O level-shifting) | 9 |
| Hysteresis voltage on UVVIO for protected mode | VHYS(UVVIO) | | 80 | | mV | | 9 |
| STB unpowered leakage current | Ilkg(OFF) | -1 | 0 | 1 | µA | STB = 5.5 V, VCC = VIO = 0 V | 9 |
| TXD unpowered leakage current | Ilkg(OFF) | -1 | 0 | 1 | µA | TXD = 5.5 V, VCC = VIO = 0 V | 9 |
| Input capacitance | CI | | 5 | | pF | VIN = 0.4 x sin(2 x π x 2 x 10^6 x t) + 2.5 V | 9 |
| RXD unpowered leakage current | Ilkg(OFF) | -1 | 0 | 1 | µA | RXD = 5.5 V, VCC = 0 V, VIO = 0 V | 10 |
| Bus output voltage (dominant) CANH | VO(DOM) | 2.75 | | 4.5 | V | TXD = 0 V, STB = 0 V, 50 Ω ≤ RL ≤ 65 Ω, CL = open, RCM = open | 10 |
| Bus output voltage (dominant) CANL | VO(DOM) | 0.5 | | 2.25 | V | TXD = 0 V, STB = 0 V, 50 Ω ≤ RL ≤ 65 Ω, CL = open, RCM = open | 10 |
| Bus output voltage (recessive) CANH and CANL | VO(REC) | 2 | | 3 | V | TXD = VCC or VIO, VIO = VCC, STB = 0 V, RL = open (no load), RCM = open | 10 |
| Bus output voltage (standby mode) CANH | VO(STB) | -0.1 | 0 | 0.1 | V | STB = VIO, RL = open (no load), RCM = open | 10 |
| Bus output voltage (standby mode) CANL | VO(STB) | -0.1 | 0 | 0.1 | V | STB = VIO, RL = open (no load), RCM = open | 10 |
| Bus output voltage (standby mode) CANH - CANL | VO(STB) | -0.2 | 0 | 0.2 | V | STB = VIO, RL = open (no load), RCM = open | 10 |
| Differential output voltage (dominant) CANH - CANL | VOD(DOM) | 1.4 | | 3 | V | TXD = 0 V, STB = 0 V, 45 Ω ≤ RL < 50 Ω, CL = open, RCM = open | 10 |
| Differential output voltage (dominant) CANH - CANL | VOD(DOM) | 1.5 | | 3 | V | TXD = 0 V, STB = 0 V, 50 Ω ≤ RL ≤ 65 Ω, CL = open, RCM = open | 10 |
| Differential output voltage (dominant) CANH - CANL | VOD(DOM) | 1.5 | | 5 | V | TXD = 0 V, STB = 0 V, RL = 2240 Ω, CL = open, RCM = open | 10 |
| Differential output voltage (recessive) CANH - CANL | VOD(REC) | -120 | | 12 | mV | TXD = VCC, STB = 0 V, RL = 60 Ω, CL = open, RCM = open | 10 |
| Differential output voltage (recessive) CANH - CANL | VOD(REC) | -50 | | 50 | mV | TXD = VCC, STB = 0 V, RL = open (no load), CL = open, RCM = open | 10 |
| Output symmetry (dominant or recessive) | VSYM | 0.9 | | 1.1 | V/V | (VO(CANH) + VO(CANL)) / VCC, STB at 0 V, Rterm = 60 Ω, Csplit = 4.7 nF, CL = open, RCM = open, TXD = 250 kHz, 1 MHz | 10 |
| DC output symmetry (dominant or recessive) | VSYM_DC | -0.4 | | 0.4 | V | (VCC, VO(CANH), VO(CANL)), STB = 0 V, RL = 60 Ω, CL = open, RCM = open | 10 |
| Short-circuit steady-state output current, dominant, CANH | IOS(SS_DOM) | | | -100 | mA | STB at 0 V, VCANH = -5 V to 40 V, CANL = open, TXD = 0 V | 10 |
| Short-circuit steady-state output current, dominant, CANL | IOS(SS_DOM) | | | 100 | mA | STB at 0 V, VCANL = -5 V to 40 V, CANH = open, TXD = 0 V | 10 |
| Short-circuit steady-state output current, recessive, normal mode | IOS(SS_REC) | -5 | | 5 | mA | STB at 0 V, -27 V ≤ VBUS ≤ 32 V, VBUS = CANH = CANL, TXD = VCC | 10 |
| Common mode range, normal mode | VCM | -30 | | 30 | V | STB = 0 V | 11 |
| Positive-going input threshold voltage, normal mode (CM ±20 V) | VIT+ | | | 900 | mV | STB = 0 V, -20 V ≤ VCM ≤ +20 V | 11 |
| Negative-going input threshold voltage, normal mode (CM ±20 V) | VIT- | 500 | | | mV | STB = 0 V, -20 V ≤ VCM ≤ +20 V | 11 |
| Positive-going input threshold voltage, normal mode (CM ±30 V) | VIT+ | | | 1000 | mV | STB = 0 V, -30 V ≤ VCM ≤ +30 V | 11 |
| Negative-going input threshold voltage, normal mode (CM ±30 V) | VIT- | 400 | | | mV | STB = 0 V, -30 V ≤ VCM ≤ +30 V | 11 |
| Hysteresis voltage (VIT+ - VIT-), normal mode | VHYS | | 120 | | mV | STB = 0 V | 11 |
| Common mode range, standby mode (V suffix), 4.5 V ≤ VIO ≤ 5.5 V | VCM | -12 | | 12 | V | STB = VIO, Devices with V suffix | 11 |
| Common mode range, standby mode (V suffix), 3.0 V ≤ VIO ≤ 4.5 V | VCM | -2 | | 7 | V | STB = VIO, Devices with V suffix | 11 |
| Input threshold voltage, standby mode | VIT(STANDBY) | 400 | | 1150 | mV | STB = VCC or VIO | 11 |
| Power-off (unpowered) bus input leakage current | ILKG(IOFF) | | | 4.8 | µA | CANH = CANL = 5 V, VCC = VIO = 0 V | 11 |
| Input capacitance to ground (CANH or CANL) | CI | | 24 | 30 | pF | TXD = VCC, VIO = VCC | 11 |
| Differential input capacitance (CANH to CANL) | CID | | 12 | 15 | pF | TXD = VCC, VIO = VCC | 11 |
| Differential input resistance | RID | 30 | | 80 | kΩ | TXD = VCC = VIO = 5 V, STB = 0 V, -30 V ≤ VCM ≤ +30 V | 11 |
| Input resistance (CANH or CANL) | RIN | 15 | | 40 | kΩ | | 11 |
| Input resistance matching | RIN(M) | -2 | | 2 | % | [1, RIN(CANH) / RIN(CANL)] × 100%, VCANH = VCANL = 5 V | 11 |
| Total loop delay, recessive to dominant | tPROP(LOOP1) | 100 | | 160 | ns | STB = 0 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF | 12 |
| Total loop delay, dominant to recessive | tPROP(LOOP2) | 110 | | 175 | ns | STB = 0 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF | 12 |
| Mode change time, Normal to Standby or Standby to Normal | tMODE | 9 | | 45 | µs | See Figure 8-3 | 12 |
| Filter time for valid wake up pattern | tWK_FILTER | 0.5 | | 1.8 | µs | | 12 |
| Dominant timeout | tTXD_DTO | 1.2 | | 3.8 | ms | STB = 0 V, RL = 60 Ω, CL = open | 12 |
| Bit time on CAN bus output pins, tBIT(TXD) = 500 ns, all devices | tBIT(BUS) | 435 | | 530 | ns | STB = 0 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF | 12 |
| Bit time on RXD output pins, tBIT(TXD) = 500 ns, all devices | tBIT(RXD) | 400 | | 550 | ns | | 12 |
| Receiver timing symmetry, tBIT(TXD) = 500 ns, all devices | ΔtREC | -65 | | 40 | ns | | 12 |
| Bit time on CAN bus output pins, tBIT(TXD) = 200 ns, G variants | tBIT(BUS) | 155 | | 210 | ns | G device variants only | 12 |
| Bit time on RXD output pins, tBIT(TXD) = 200 ns, G variants | tBIT(RXD) | 120 | | 220 | ns | G device variants only | 12 |
| Receiver timing symmetry, tBIT(TXD) = 200 ns, G variants | ΔtREC | -45 | | 15 | ns | G device variants only | 12 |
## CAD (KiCad official)
- Symbol: `TCAN1042HGVDRBRQ1`
- Footprint: `Package_SON:HVSON-8-1EP_3x3mm_P0.65mm_EP1.6x2.4mm`
- 3D model: HVSON-8-EP(3x3) (KiCad packages3D, STEP)
- 3D model files: `tcan1042hgvdrbrq1-etched.step` / `tcan1042hgvdrbrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tcan1042hgvdrbrq1.step` / `tcan1042hgvdrbrq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tcan1042hgv-q1.pdf) (51 pp, sha256 `fe80d6638522457f`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tcan1042hgvdrbrq1-datasheet.pdf)