TCAN1042HDRBRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	TXD	input	CAN transmit data input, LOW for dominant and HIGH for recessive bus states.
2	GND	power_in	Ground connection; on the DRB (VSON) package the thermal pad may be connected to GND to optimize thermal characteristics.
3	VCC	power_in	Transceiver 5-V supply voltage, operating range 4.5 V to 5.5 V.
4	RXD	output	CAN receive data output, LOW for dominant and HIGH for recessive bus states, driven to VCC on devices without the V suffix.
5	NC	unconnected	No connect on the base/H/G/HG devices; not internally connected and may be left floating or tied to any existing net.
6	CANL	bidirectional	Low level CAN bus input/output line; bus fault protection is ±70 V on H devices.
7	CANH	bidirectional	High level CAN bus input/output line; bus fault protection is ±70 V on H devices.
8	STB	input	Standby mode control input, active high.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-8
Category	Interface ICs
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
5-V bus supply voltage	VCC	-0.3		7	V		6
CAN bus I/O voltage (CANH, CANL), H suffix	VBUS	-70		70	V	Devices with the H suffix	6
Max differential voltage CANH-CANL, H suffix	V(Diff)	-70		70	V	Devices with the H suffix	6
Logic input terminal voltage (TXD, STB)	V(Logic_Input)	-0.3		7	V	max 7 and VI ≤ VIO + 0.3	6
Logic output terminal voltage (RXD)	V(Logic_Output)	-0.3		7	V	max 7 and VI ≤ VIO + 0.3	6
RXD output current	IO(RXD)	-8		8	mA		6
Virtual junction temperature	TJ	-55		150	°C		6
Storage temperature	TSTG	-65		150	°C		6
ESD HBM, all pins	VESD	-6000		6000	V	HBM classification level 3A, AEC Q100-002	6
ESD HBM, CANH and CANL to GND	VESD	-16000		16000	V	HBM classification level 3B	6
ESD CDM, all pins	VESD	-1500		1500	V	CDM classification level C6, AEC Q100-011	6
5-V bus supply voltage range	VCC	4.5		5.5	V		8
RXD high level output current	IOH(RXD)	-2			mA		8
RXD low level output current	IOL(RXD)			2	mA		8
Junction-to-air thermal resistance, DRB (VSON)	RθJA		48.3		°C/W	High-K thermal resistance	8
Junction-to-board thermal resistance, DRB	RθJB		17.2		°C/W		8
Junction-to-case (top) thermal resistance, DRB	RθJC(TOP)		37.6		°C/W		8
Thermal shutdown temperature	TTSD		170		°C		8
Thermal shutdown hysteresis	TTSD_HYS		5		°C		8
5-V supply current, normal mode dominant, typical bus load	ICC		40	70	mA	TXD = 0 V, RL = 60 Ω, CL = open, RCM = open, STB = 0 V	9
5-V supply current, normal mode dominant, high bus load	ICC		45	80	mA	TXD = 0 V, RL = 50 Ω, CL = open, RCM = open, STB = 0 V	9
5-V supply current, dominant with bus fault	ICC			110	mA	TXD = 0 V, STB = 0 V, CANH = -12 V, RL = open, CL = open, RCM = open	9
5-V supply current, normal mode recessive	ICC		1.5	2.5	mA	TXD = VCC or VIO, RL = 50 Ω, CL = open, RCM = open, STB = 0 V	9
5-V supply current, standby mode (non-V)	ICC		22		µA	TXD = VCC, RL = 50 Ω, CL = open, RCM = open, STB = VCC	9
Rising undervoltage detection on VCC	UVVCC		4.2	4.4	V	All devices, protected mode	9
Falling undervoltage detection on VCC	UVVCC	3.8	4	4.25	V	protected mode	9
Hysteresis voltage on UVVCC	VHYS(UVVCC)		200		mV		9
STB high-level input voltage (5-V only)	VIH	2			V	Devices without the V suffix	9
STB low-level input voltage (5-V only)	VIL			0.8	V	Devices without the V suffix	9
STB high-level input leakage current	IIH	-2		2	µA	STB = VCC = VIO = 5.5 V	9
STB low-level input leakage current	IIL	-20	0	-2	µA	STB = 0V, VCC = VIO = 5.5 V	9
STB unpowered leakage current	Ilkg(OFF)	-1	0	1	µA	STB = 5.5 V, VCC = VIO = 0 V	9
TXD high-level input voltage (5-V only)	VIH	2			V	Devices without the V suffix	9
TXD low-level input voltage (5-V only)	VIL			0.8	V	Devices without the V suffix	9
TXD high-level input leakage current	IIH	-2.5	0	1	µA	TXD = VCC = VIO = 5.5 V	9
TXD low-level input leakage current	IIL	-100	-25	-7	µA	TXD = 0 V, VCC = VIO = 5.5 V	9
TXD unpowered leakage current	Ilkg(OFF)	-1	0	1	µA	TXD = 5.5 V, VCC = VIO = 0 V	9
TXD input capacitance	CI		5		pF	VIN = 0.4 x sin(2 x π x 2 x 10^6 x t) + 2.5 V	9
RXD high-level output voltage (5-V only)	VOH	4	4.6		V	Devices without the V suffix, IO = -2 mA	10
RXD low-level output voltage (5-V only)	VOL		0.2	0.4	V	Devices without the V suffix, IO = +2 mA	10
RXD unpowered leakage current	Ilkg(OFF)	-1	0	1	µA	RXD = 5.5 V, VCC = 0 V, VIO = 0 V	10
Bus output voltage dominant, CANH	VO(DOM)	2.75		4.5	V	TXD = 0 V, STB = 0 V, 50 Ω ≤ RL ≤ 65 Ω, CL = open, RCM = open	10
Bus output voltage dominant, CANL	VO(DOM)	0.5		2.25	V	TXD = 0 V, STB = 0 V, 50 Ω ≤ RL ≤ 65 Ω, CL = open, RCM = open	10
Bus output voltage recessive, CANH and CANL	VO(REC)	2		3	V	TXD = VCC or VIO, VIO = VCC, STB = 0 V, RL = open, RCM = open; typ printed as 0.5 × VCC	10
Bus output voltage standby, CANH-CANL	VO(STB)	-0.2	0	0.2	V	STB = VIO, RL = open (no load), RCM = open	10
Differential output voltage dominant, 45 Ω ≤ RL < 50 Ω	VOD(DOM)	1.4		3	V	TXD = 0 V, STB = 0 V, CL = open, RCM = open	10
Differential output voltage dominant, 50 Ω ≤ RL ≤ 65 Ω	VOD(DOM)	1.5		3	V	TXD = 0 V, STB = 0 V, CL = open, RCM = open	10
Differential output voltage dominant, RL = 2240 Ω	VOD(DOM)	1.5		5	V	TXD = 0 V, STB = 0 V, CL = open, RCM = open	10
Differential output voltage recessive, RL = 60 Ω	VOD(REC)	-120		12	mV	TXD = VCC, STB = 0 V, RL = 60 Ω, CL = open, RCM = open	10
Differential output voltage recessive, no load	VOD(REC)	-50		50	mV	TXD = VCC, STB = 0 V, RL = open (no load), CL = open, RCM = open	10
Output symmetry	VSYM	0.9		1.1	V/V	STB at 0 V, Rterm = 60 Ω, Csplit = 4.7 nF, CL = open, RCM = open, TXD = 250 kHz, 1 MHz	10
DC output symmetry	VSYM_DC	-0.4		0.4	V	STB = 0 V, RL = 60 Ω, CL = open, RCM = open	10
Short-circuit steady-state output current, dominant (CANH)	IOS(SS_DOM)	-100			mA	STB at 0 V, VCANH = -5 V to 40 V, CANL = open, TXD = 0 V	10
Short-circuit steady-state output current, dominant (CANL)	IOS(SS_DOM)			100	mA	STB at 0 V, VCANL = -5 V to 40 V, CANH = open, TXD = 0 V	10
Short-circuit steady-state output current, recessive	IOS(SS_REC)	-5		5	mA	STB at 0 V, -27 V ≤ VBUS ≤ 32 V, VBUS = CANH = CANL, TXD = VCC	10
Common mode range, normal mode	VCM	-30		30	V	STB = 0 V	11
Positive-going input threshold, normal mode	VIT+			900	mV	STB = 0 V, -20 V ≤ VCM ≤ +20 V	11
Negative-going input threshold, normal mode	VIT-	500			mV	STB = 0 V, -20 V ≤ VCM ≤ +20 V	11
Input threshold, standby mode	VIT(STANDBY)	400		1150	mV	STB = VCC or VIO	11
Input resistance (CANH or CANL)	RIN	15		40	kΩ	TXD = VCC = VIO = 5 V, STB = 0 V, -30 V ≤ VCM ≤ +30 V	11
Differential input resistance	RID	30		80	kΩ	TXD = VCC = VIO = 5 V, STB = 0 V, -30 V ≤ VCM ≤ +30 V	11
Total loop delay, recessive to dominant	tPROP(LOOP1)		100	160	ns	STB = 0 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF	12
Total loop delay, dominant to recessive	tPROP(LOOP2)		110	175	ns	STB = 0 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF	12

CAD (KiCad official)

Symbol: TCAN1042HDRBRQ1
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: tcan1042hdrbrq1-etched.step / tcan1042hdrbrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tcan1042hdrbrq1.step / tcan1042hdrbrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (41 pp, sha256 3b66c68542cea6ea, retrieved 2026-10-31, tier: manufacturer)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

TCAN1042HDRBRQ1

Verified TCAN1042HDRBRQ1

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README